Synchro

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The Filière Energie et Techniques environnementales (FET) has the digital systems course and labs in the 3rd (autumn) semester. The semester counts 15 weeks and ends with a little project. The aim of the generator synchronzation project is to align an AC motor used as a generator to a reference 50 HZ signal.

Motor and Generator

Specification

Function

The reference signal and the generator output are digitized to 1 bit with the help of two comparators. The digital circuit receives these signals and controls a DC motor coupled to the generator.

Synchro Schematic

The circuit can be controlled by 4 buttons. It can display information on a row of 8 LEDs.

Circuit

The circuit works as follows:

  • the difference between the mains period and the generator period is calculated
  • if the generator is too slow, the DC motor voltage is raised; if the generator is too fast, the DC motor voltage is diminished

Components

The system consists of

Motor-generator assembly

The DC motor is controlled via a 12 V PWM signal. It is mechanically coupled to the DC generator. With a mean voltage of 6 V, the assembly turns at a frequency close to 50 Hz.

FPGA board

The main board is the school's FPGA-EBS lab development board. It hosts a Xilinx Spartan xc3s500e FPGA and features many different interfaces.

Synchro I/O board

The HEB-synchro I/O board receives 2 sinewaves: one from a 50 Hz function generator and one from the AC generator. These signals are converted to 3.3 V logic levels by CMOS Schmitt triggers for the FPGA. The 50 Hz analog input should have the proper amplitude and offset to fit within the 0 V to 3.3 V power supply range.

The FPGA delivers a PWM output which controls a power switch. The switch then drives the DC motor. The PWM frequency should be smaller than 100 kHz.

Getting started

In order to start the projects you should do the following:

  • Read carefully the specifications above
  • Draw the architecture of the circuit in the form of a block diagram
  • Consult the guides for the first steps into the design software

Additional Information

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