Inverter

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An I/O board with 4 switches and 8 LEDs allows to control the operating mode and to display information about the system's state.
 
An I/O board with 4 switches and 8 LEDs allows to control the operating mode and to display information about the system's state.
  
=== Circuit ===
+
=== PWM modes ===
  
The circuit works as follows:
+
Different PWM modes are to be investigated:
* the difference between the mains period and the generator period is calculated
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* a two-level mode switching between 0 V and 12 V
* if the generator is too slow, the DC motor voltage is raised; if the generator is too fast, the DC motor voltage is diminished
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* three-level modes switching between -6 V, 0 V and 6 V
  
 
== Components ==
 
== Components ==

Revision as of 12:04, 8 September 2015

Contents

The Filière Energie et Techniques environnementales (FET) has the digital systems course and labs in the 3rd (autumn) semester. The semester counts 15 weeks and ends with a little project. The aim of the inverter project is to generate a 50 Hz AC power supply from a DC input.

Inverter boards.JPG

Specification

Function

The 12 V power supply is chopped by the power switches of an H-bridge in order to generate a sine wave. The resulting voltage is filtered by a passive LC filter to provide a smooth sine wave. The digital system generates the PWM controls of the 4 power switches.

Inverter system.svg

An I/O board with 4 switches and 8 LEDs allows to control the operating mode and to display information about the system's state.

PWM modes

Different PWM modes are to be investigated:

  • a two-level mode switching between 0 V and 12 V
  • three-level modes switching between -6 V, 0 V and 6 V

Components

The system consists of

Motor-generator assembly

The DC motor is controlled via a 12 V PWM signal. It is mechanically coupled to the DC generator. With a mean voltage of 6 V, the assembly turns at a frequency close to 50 Hz.

FPGA board

The main board is the school's FPGA-EBS lab development board. It hosts a Xilinx Spartan xc3s500e FPGA and features many different interfaces.

Synchro I/O board

The HEB-synchro I/O board receives 2 sinewaves: one from a 50 Hz function generator and one from the AC generator. These signals are triggered at 0 V in order to deliver logic-levels signals to the FPGA.

The FPGA delivers a PWM output which controls a power switch. The switch then drives the DC motor.

Getting started

In order to start the projects you should do the following:

  • Read carefully the specifications above
  • Draw the architecture of the circuit in the form of a block diagram
  • Consult the guides for the first steps into the design software

Additional Information

Additional informations for teachers.

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