Inverter/board combination

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! ID
 +
! [http://wiki.hevs.ch/uit/index.php5/Hardware/Stock_FPGA-EBS#Student FPGA Board]
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! [http://wiki.hevs.ch/uit/index.php5/Hardware/Stock_Programmer#Digilent_Xilinx_Programmer Programmer]
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! [http://wiki.hevs.ch/uit/index.php5/Hardware/Stock_PP#HEB_LCD_V1.0_.28a.k.a._Buttons_.26_LEDs.29 Buttons and<br />LEDs board]
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! [http://wiki.hevs.ch/uit/index.php5/Hardware/Stock_PP#v2 Lowpass<br />filter]
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! [http://wiki.hevs.ch/uit/index.php5/Hardware/Stock_Mez#PWM Mezzanine<br />C-board ]
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! H-Bridge || power<br />lowpass || EEPROM<br />Programmed || Group<br />Members || Comment
 
|-
 
|-
! Number || FPGA Board || Programmer || Buttons<br />board || Lowpass<br />filter || Mezzanine<br />board || H-Bridge || power<br />lowpass || EEPROM<br />programmed || group E1 || group E3 || Comment
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| ETE-1 || 21 || 21 || 01 || 91 || 71 || 21 || 51 || yes || Mojon, Scapini ||
 
|-
 
|-
| A203-E1 ||         21 ||         11 ||                 1 ||                 91 ||                     ||       21 ||                 51 || no                    || Giulieri || Vincent et David ||
+
| ETE-|| 14 || 22 || 02 || 92 || 72 || 22 || 52 || yes || Germanier, rod ||
 
|-
 
|-
| A203-E2 ||         12 ||         12 ||                 2 ||                 92 ||                     ||       22 ||                 52 || no                    ||          || ||
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| ETE-|| 13 || 23 || 13 || 93 || 73 || 23 || 53 || yes || Remondeulaz, Souto ||  
 
|-
 
|-
| A203-E3 ||         13 ||           ||                 13 ||                 93 ||                     ||       23 ||                 53 || no                    ||         || || no progr.
+
| ETE-|| 24 || 24 || 04 || 94 || 74 || 24 || 54 || yes || Federici, Zurbrügg ||
 
|-
 
|-
| A203-E4 ||         14 ||         14 ||                 4 ||                 94 ||                     ||       24 ||                 54 || no                    || Wehrli, Jitnikoff || Wenger, Zeiter ||
+
| ETE-|| 23 || 25 || 05 || 95 || 75 || 25 || 55 || yes || ||
 
|-
 
|-
| A203-E5 ||         15 ||         31 ||                 5 ||                 95 ||                     ||       25 ||                 55 || no                    ||Lucien Schaer Félix Savy|| ||
+
| ETE-|| 56 || 26 || 06 || 96 || 76 || 26 || 56 || yes || Amrani, Moret ||
 
|-
 
|-
| A203-E6 ||         16 ||         16 ||                 6 ||                 96 ||                     ||       26 ||                 56 || yes                   || || ||
+
| ETE-|| 15 || 27 || 07 || 97 || 77 || 27 || 57 || yes || || no H-bridge
 
|-
 
|-
| A203-E7 ||         31 ||         17 ||                 7 ||                 97 ||                     ||       27 ||                 57 || no                    || justin, Guillaume || Christopher, Luc||
+
| ETE-|| 16 || 28 || 08 || 98 || 78 || 28 || 58 || yes || ||
 
|-
 
|-
| A203-E8 ||         23 ||         18 ||                 8 ||                 98 ||                     ||       28 ||                 58 || yes                   || MichFr  || LM_RV ||
+
| ETE-|| 05 || 29 || 09 || 99 || 79 || 29 || 59 || yes || ||
 
|-
 
|-
| A203-E9 ||         24 ||         19 ||                 9 ||                 99 ||                     ||       29 ||                 59 || yes                   ||         || Michellod Udressy ||
+
| ETE-10 || 50 || 30 || 10 || 100 || 70 || 20 || 50 || yes || Board 27 defect ||
 
|-
 
|-
| A203-E10||         25 ||         10 ||                 10 ||                 90 ||                     ||       20 ||                 50 || yes                   ||         || Fournier, Zenelaj ||
+
| ETE-11 || 22 || 31 || 11 || 101 || 81 ||   ||   || yes || || No H-bridge/lowpass
 +
|-
 +
| ETE-12 || 30 || 38 || 12 || 102 || 82 ||    ||    || yes ||  || Not complete but FPGA ready
 
|}
 
|}
  
 
[[Category:Bachelor]] [[Category:ElN]] [[Category:Inverter]]
 
[[Category:Bachelor]] [[Category:ElN]] [[Category:Inverter]]

Revision as of 14:39, 16 December 2019

ID FPGA Board Programmer Buttons and
LEDs board
Lowpass
filter
Mezzanine
C-board
H-Bridge power
lowpass
EEPROM
Programmed
Group
Members
Comment
ETE-1 21 21 01 91 71 21 51 yes Mojon, Scapini
ETE-2 14 22 02 92 72 22 52 yes Germanier, rod
ETE-3 13 23 13 93 73 23 53 yes Remondeulaz, Souto
ETE-4 24 24 04 94 74 24 54 yes Federici, Zurbrügg
ETE-5 23 25 05 95 75 25 55 yes
ETE-6 56 26 06 96 76 26 56 yes Amrani, Moret
ETE-7 15 27 07 97 77 27 57 yes no H-bridge
ETE-8 16 28 08 98 78 28 58 yes
ETE-9 05 29 09 99 79 29 59 yes
ETE-10 50 30 10 100 70 20 50 yes Board 27 defect
ETE-11 22 31 11 101 81 yes No H-bridge/lowpass
ETE-12 30 38 12 102 82 yes Not complete but FPGA ready
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