Synchro

(Difference between revisions)
Jump to: navigation, search
(Components)
(18 intermediate revisions by 2 users not shown)
Line 4: Line 4:
 
has the digital systems course and labs in the 3rd (autumn) semester.
 
has the digital systems course and labs in the 3rd (autumn) semester.
 
The semester counts 15 weeks and ends with a little project.
 
The semester counts 15 weeks and ends with a little project.
 +
The aim of the [https://en.wikipedia.org/wiki/Synchronization_(alternating_current) generator synchronzation] project is to align an AC motor used as a generator to a reference 50 HZ signal.
  
The aim to the project is to synchronise an AC motor used as a generator to a reference 50 HZ signal.
+
[[File:Synchro Motors.jpg|400px|center|thumb|Motor and Generator]]
  
 
== Specification ==
 
== Specification ==
Line 13: Line 14:
 
The reference signal and the generator output are digitized to 1 bit with the help of two comparators.
 
The reference signal and the generator output are digitized to 1 bit with the help of two comparators.
 
The digital circuit receives these signals and controls a DC motor coupled to the generator.
 
The digital circuit receives these signals and controls a DC motor coupled to the generator.
 +
 +
[[File:Synchro system.svg|500px|center|thumb|Synchro Schematic]]
 +
 +
The circuit can be controlled by 4 buttons.
 +
It can display information on a row of 8 LEDs.
  
 
=== Circuit ===
 
=== Circuit ===
Line 23: Line 29:
  
 
The system consists of
 
The system consists of
* an assembly of a DC motor and an AC generator
+
* an [[Synchro#Motor-generator assembly|assembly of a DC motor and an AC generator]]
* an [http://wiki.hevs.ch/uit/index.php5/Hardware/FPGAEBS FPGA prototyping board]
+
* an [[Synchro#FPGA_board|FPGA prototyping board]]
* a synchro I/O board with 2 sinewave inputs and a PWM output
+
<!--
 +
* an [[Synchro#Synchro_I.2FO_board|I/O board]] with 2 sinewave inputs and a PWM output
 +
-->
 +
* an [http://wiki.hevs.ch/uit/index.php5/Hardware/Parallelport/heb_lcd  user board] with 4 buttons and 8 LEDs
  
 
=== Motor-generator assembly ===
 
=== Motor-generator assembly ===
 
The DC motor is controlled via a 12&nbsp;V PWM signal.
 
The DC motor is controlled via a 12&nbsp;V PWM signal.
 
It is mechanically coupled to the DC generator.
 
It is mechanically coupled to the DC generator.
With a mean voltage of 6&nbsp;V, the assembly turns at about 50&nbsp;Hz.
+
With a mean voltage of 6&nbsp;V, the assembly turns at a frequency close to 50&nbsp;Hz.
  
 
=== FPGA board ===
 
=== FPGA board ===
The main board is the school's [http://wiki.hevs.ch/uit/index.php5/Hardware/FPGAEBS FPGA-EBS lab development board]. It hosts a [http://www.xilinx.com/products/silicon-devices/fpga/spartan-3.html Xilinx Spartan xc3s500e FPGA] and features many different interfaces.
+
The main board is the school's [http://wiki.hevs.ch/uit/index.php5/Hardware/FPGAEBS FPGA-EBS lab development board].
 +
It hosts a [http://www.xilinx.com/products/silicon-devices/fpga/spartan-3.html Xilinx Spartan xc3s500e FPGA]
 +
and features many different interfaces.
 +
Its quartz oscillator provides a clock of 66&nbsp;MHz.
  
 
=== Synchro I/O board ===
 
=== Synchro I/O board ===
  
The I/O board receives 2&nbsp;sinewaves: one from a 50&nbsp;Hz function generator and one from the AC generator.
+
The [http://wiki.hevs.ch/uit/index.php5/Hardware/Parallelport/heb_synchro HEB-synchro] I/O board receives 2&nbsp;sinewaves: one from a 50&nbsp;Hz function generator and one from the AC generator.
These signals are triggered at 0&nbsp;V in order to deliver logic-levels signals to the FPGA.
+
These signals are converted to 3.3&nbsp;V logic levels by
 +
[http://www.nxp.com/products/discretes-and-logic/logic/hct/hex-inverting-schmitt-trigger:74HC14D CMOS Schmitt triggers] for the FPGA.
 +
The 50&nbsp;Hz analog input should have the proper amplitude and offset to fit within the 0&nbsp;V to 3.3&nbsp;V power supply range.
  
 
The FPGA delivers a PWM output which controls a power switch.
 
The FPGA delivers a PWM output which controls a power switch.
 
The switch then drives the DC motor.
 
The switch then drives the DC motor.
 +
The PWM frequency should be smaller than 100&nbsp;kHz.
  
 
== Getting started ==
 
== Getting started ==
Line 51: Line 66:
 
** [[Synchro/students_de|Anleitung auf Deutsch]]
 
** [[Synchro/students_de|Anleitung auf Deutsch]]
  
== Semester organization ==
+
== Additional Information ==
  
=== Week schedule ===
+
* [[Synchro/board combination|Board combinations]]
 +
* Additional informations for [[Synchro/teachers|teachers]].
  
{| cellpadding="4" cellspacing="0" border="1"
+
[[Category:Bachelor]] [[Category:ElN]] [[Category:Synchro]]
! Week !! Course !! Lab
+
|-
+
| 1 || NUM / COM || PHA - phase accuracy display<br/>(introduction to the tools)
+
|-
+
| 2|| COM / KAR || NUM - numbers and operations
+
|-
+
| 3|| KAR / MUX || ADD - binary adder
+
|-
+
| 4|| MUX / LST || MUL - multiplier
+
|-
+
| 5|| LST / LAT || PHD - phase detector
+
|-
+
| 6|| LAT || PHD
+
|-
+
| 7|| CNT || PHU - phase unwrapper
+
|-
+
| 8|| FSM || COM - Serial port receiver
+
|-
+
| 9 - 15||  || project
+
|}
+
 
+
== Additional Information ==
+
Additional informations for [[Synchro/teachers|teachers]].
+

Revision as of 09:15, 20 November 2020

Contents

The Filière Energie et Techniques environnementales (FET) has the digital systems course and labs in the 3rd (autumn) semester. The semester counts 15 weeks and ends with a little project. The aim of the generator synchronzation project is to align an AC motor used as a generator to a reference 50 HZ signal.

Motor and Generator

Specification

Function

The reference signal and the generator output are digitized to 1 bit with the help of two comparators. The digital circuit receives these signals and controls a DC motor coupled to the generator.

Synchro Schematic

The circuit can be controlled by 4 buttons. It can display information on a row of 8 LEDs.

Circuit

The circuit works as follows:

  • the difference between the mains period and the generator period is calculated
  • if the generator is too slow, the DC motor voltage is raised; if the generator is too fast, the DC motor voltage is diminished

Components

The system consists of

Motor-generator assembly

The DC motor is controlled via a 12 V PWM signal. It is mechanically coupled to the DC generator. With a mean voltage of 6 V, the assembly turns at a frequency close to 50 Hz.

FPGA board

The main board is the school's FPGA-EBS lab development board. It hosts a Xilinx Spartan xc3s500e FPGA and features many different interfaces. Its quartz oscillator provides a clock of 66 MHz.

Synchro I/O board

The HEB-synchro I/O board receives 2 sinewaves: one from a 50 Hz function generator and one from the AC generator. These signals are converted to 3.3 V logic levels by CMOS Schmitt triggers for the FPGA. The 50 Hz analog input should have the proper amplitude and offset to fit within the 0 V to 3.3 V power supply range.

The FPGA delivers a PWM output which controls a power switch. The switch then drives the DC motor. The PWM frequency should be smaller than 100 kHz.

Getting started

In order to start the projects you should do the following:

  • Read carefully the specifications above
  • Draw the architecture of the circuit in the form of a block diagram
  • Consult the guides for the first steps into the design software

Additional Information

Personal tools
Namespaces
Variants
Actions
Navigation
Modules/Projects
Browse
Toolbox