Libero IDE presentation
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we laucnch [https://www.microsemi.com/product-directory/design-resources/1751-libero-ide Libero IDE] | we laucnch [https://www.microsemi.com/product-directory/design-resources/1751-libero-ide Libero IDE] | ||
directly from [https://www.mentor.com/products/fpga/hdl_design/hdl_designer_series/ HDL Designer]. | directly from [https://www.mentor.com/products/fpga/hdl_design/hdl_designer_series/ HDL Designer]. | ||
| − | * the <code>prepare for synthesis</code> task does the following: | + | The setup bases on a set of [[Eln/teacher#Tools_setup|environment variables]]. |
| + | |||
| + | === Files === | ||
| + | |||
| + | The main design files are located in <code>$PATH/Board/concat</code>: | ||
| + | $DESIGN.vhd | ||
| + | $DESIGN.pdc | ||
| + | |||
| + | The Physical Design Constraints <code>.pdc</code> file specifies the I/O locations and electric levels. | ||
| + | |||
| + | Further design files are found in <code>$PATH/Board/Libero</code>: | ||
| + | $DESIGN.prjx | ||
| + | synthesis/$DESIGN_syn.prj | ||
| + | designer/impl1/$DESIGN.adb | ||
| + | designer/impl1/$DESIGN.ide_des | ||
| + | designer/impl1/$DESIGN.pdb | ||
| + | |||
| + | This second set of files is copied into a temporary directory which will be additionally populated by the numerous design files generated by the deign tool. | ||
| + | |||
| + | === Tasks === | ||
| + | |||
| + | Launching the tools is done in two steps. | ||
| + | * with the top-level block selected, the <code>prepare for synthesis</code> task does the following: | ||
** the design tool generates a single VHDL file | ** the design tool generates a single VHDL file | ||
** the <code>trimLibs.pl</code> script replaces all library definitions with the one of <code>work</code> | ** the <code>trimLibs.pl</code> script replaces all library definitions with the one of <code>work</code> | ||
| Line 14: | Line 36: | ||
** the <code>Update prjx.pl</code> script updates the paths specified in the <code>.prjx</code> file to reflect the project location's. | ** the <code>Update prjx.pl</code> script updates the paths specified in the <code>.prjx</code> file to reflect the project location's. | ||
** the [https://www.microsemi.com/product-directory/design-resources/1751-libero-ide Libero IDE] is launched | ** the [https://www.microsemi.com/product-directory/design-resources/1751-libero-ide Libero IDE] is launched | ||
| + | |||
| + | == Interactive run of the Libero tools == | ||
| + | |||
| + | To check the synthesis and downnload results wit a better accuracy, one can start Libero IDE and go through: | ||
| + | *Synthesize -> open interactively | ||
| + | **implementation option -> specify clock frequency | ||
| + | **run | ||
| + | **view log | ||
| + | *Compile -> open interactively | ||
| + | **I/O Attibute Editor | ||
| + | **Layout | ||
| + | **Programming File | ||
| + | * FlashPro -> open interactively | ||
| + | ** verify programmer | ||
| + | ** verify <code>.pdb</code> bitstream file | ||
| + | ** program | ||
Revision as of 17:31, 21 December 2020
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Libero IDE is used to program the Microchip FPGAs.
Work environment
At HEI, we laucnch Libero IDE directly from HDL Designer. The setup bases on a set of environment variables.
Files
The main design files are located in $PATH/Board/concat:
$DESIGN.vhd $DESIGN.pdc
The Physical Design Constraints .pdc file specifies the I/O locations and electric levels.
Further design files are found in $PATH/Board/Libero:
$DESIGN.prjx synthesis/$DESIGN_syn.prj designer/impl1/$DESIGN.adb designer/impl1/$DESIGN.ide_des designer/impl1/$DESIGN.pdb
This second set of files is copied into a temporary directory which will be additionally populated by the numerous design files generated by the deign tool.
Tasks
Launching the tools is done in two steps.
- with the top-level block selected, the
prepare for synthesistask does the following:- the design tool generates a single VHDL file
- the
trimLibs.plscript replaces all library definitions with the one ofwork
- the
Libero Project Navigatortask does the following:- the
Update prjx.plscript updates the paths specified in the.prjxfile to reflect the project location's. - the Libero IDE is launched
- the
Interactive run of the Libero tools
To check the synthesis and downnload results wit a better accuracy, one can start Libero IDE and go through:
- Synthesize -> open interactively
- implementation option -> specify clock frequency
- run
- view log
- Compile -> open interactively
- I/O Attibute Editor
- Layout
- Programming File
- FlashPro -> open interactively
- verify programmer
- verify
.pdbbitstream file - program
