###############################################################################
# BECKHOFF Automation GmbH                                                    #
# EtherCAT FB1130 Piggyback Controller Board User Constraint file             #
###############################################################################

########################
### Global CLK/Reset ###
########################

### Clock source 25 MHz/40 ns ###
TIMESPEC TS_REF_CLK = PERIOD TM_REF_CLK 40000 ps;
Net REF_CLK LOC=A9 | TNM_NET = TM_REF_CLK | IOSTANDARD = LVCMOS33;

### Reset ###
Net nRESET LOC=B16 | PULLUP | TIG | IOSTANDARD = LVCMOS33;

##################
### MII Port 0 ###
##################

### Receive clock period 40 ns/25 MHz ###
TIMESPEC TS_RX_CLK0 = PERIOD TM_RX_CLK0 40000 ps;
Net MII_RX_CLK0 LOC=B8 | TNM_NET = TM_RX_CLK0 | IOSTANDARD = LVCMOS33;

### RX_DV/RX_DATA setup 10 ns, hold 10 ns ###
OFFSET = IN 10 ns VALID 20 ns BEFORE MII_RX_CLK0;

### TX_ENA/TX_DATA maximum clock-to-pad 10 ns              ###
### (manually check minimum clock-to-pad = 0 ns)           ###
### TX_CLK from PHY to REF_CLK phase shift has to be       ###
### determined and compensated using TX-Shift or registers ###
TIMEGRP TM_TX0 OFFSET = OUT 10 ns AFTER REF_CLK;

Net nMII_LINK0 LOC=B2 | IOSTANDARD = LVCMOS33;
Net MII_RX_DV0 LOC=H1 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA0<0> LOC=K2 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA0<1> LOC=K1 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA0<2> LOC=J2 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA0<3> LOC=J1 | IOSTANDARD = LVCMOS33;
Net MII_RX_ERR0 LOC=G1 | IOSTANDARD = LVCMOS33;
Net MII_TX_ENA0 LOC=B1 | TNM_NET=TM_TX0 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA0<0> LOC=E1 | TNM_NET=TM_TX0 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA0<1> LOC=D1 | TNM_NET=TM_TX0 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA0<2> LOC=C2 | TNM_NET=TM_TX0 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA0<3> LOC=C1 | TNM_NET=TM_TX0 | IOSTANDARD = LVCMOS33;
#Net MII_TX_ERR0 LOC=E3 | TNM_NET=TM_TX0 | PULLDOWN | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net MII_TX_CLK0 LOC=N9 | IOSTANDARD = LVCMOS33;
Net MII_LINK_LED0 LOC=F3 | IOSTANDARD = LVCMOS33;
Net MII_CRS0 LOC=G3 | IOSTANDARD = LVCMOS33;
Net MII_COL0 LOC=H3 | IOSTANDARD = LVCMOS33;

##################
### MII Port 1 ###
##################

### Receive clock period 40 ns/25 MHz ###
TIMESPEC TS_RX_CLK1 = PERIOD TM_RX_CLK1 40000 ps;
Net MII_RX_CLK1 LOC=T9 | TNM_NET = TM_RX_CLK1 | IOSTANDARD = LVCMOS33;

### RX_DV/RX_DATA setup 10 ns, hold 10 ns ###
OFFSET = IN 10 ns VALID 20 ns BEFORE MII_RX_CLK1;

### TX_ENA/TX_DATA maximum clock-to-pad 10 ns              ###
### (manually check minimum clock-to-pad = 0 ns)           ###
### TX_CLK from PHY to REF_CLK phase shift has to be       ###
### determined and compensated using TX-Shift or registers ###
TIMEGRP TM_TX1 OFFSET = OUT 10 ns AFTER REF_CLK;

Net nMII_LINK1 LOC=B7 | IOSTANDARD = LVCMOS33;
Net MII_RX_DV1 LOC=B6 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA1<0> LOC=C3 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA1<1> LOC=A3 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA1<2> LOC=B4 | IOSTANDARD = LVCMOS33;
Net MII_RX_DATA1<3> LOC=A4 | IOSTANDARD = LVCMOS33;
Net MII_RX_ERR1 LOC=A5 | IOSTANDARD = LVCMOS33;
Net MII_TX_ENA1 LOC=A13 | TNM_NET=TM_TX1 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA1<0> LOC=A10 | TNM_NET=TM_TX1 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA1<1> LOC=C11 | TNM_NET=TM_TX1 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA1<2> LOC=B11 | TNM_NET=TM_TX1 | IOSTANDARD = LVCMOS33;
Net MII_TX_DATA1<3> LOC=A12 | TNM_NET=TM_TX1 | IOSTANDARD = LVCMOS33;
Net MII_TX_ERR1 LOC=B13 | TNM_NET=TM_TX1 | PULLDOWN | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net MII_TX_CLK1 LOC=P9 | IOSTANDARD = LVCMOS33;
Net MII_LINK_LED1 LOC=G2 | IOSTANDARD = LVCMOS33;
Net MII_CRS1 LOC=K5 | IOSTANDARD = LVCMOS33;
Net MII_COL1 LOC=L4 | IOSTANDARD = LVCMOS33;

############
### MDIO ###
############
Net MDIO LOC=B14 | IOSTANDARD = LVCMOS33;
Net MCLK LOC=A14 | IOSTANDARD = LVCMOS33;

############
### PROM ###
############
Net PROM_CLK LOC=E16 | IOSTANDARD = LVCMOS33;
Net PROM_DATA LOC=F15 | IOSTANDARD = LVCMOS33;
Net PROM_SIZE LOC=D16 | IOSTANDARD = LVCMOS33;

############
### LEDs ###
############
Net LINK_ACT<0> LOC=D8 | IOSTANDARD = LVCMOS33;
Net LINK_ACT<1> LOC=D9 | IOSTANDARD = LVCMOS33;
Net DEV_STATE LOC=D14 | IOSTANDARD = LVCMOS33;
Net LED_RUN LOC=D14 | IOSTANDARD = LVCMOS33;

#####################
### DC Sync/Latch ###
#####################
Net SYNC_OUT<0> LOC=M1 | IOSTANDARD = LVCMOS33;
Net SYNC_OUT<1> LOC=M4 | IOSTANDARD = LVCMOS33;
Net SYNC_OUT0 LOC=M1 | IOSTANDARD = LVCMOS33;
Net SYNC_OUT1 LOC=M4 | IOSTANDARD = LVCMOS33;

Net LATCH_IN<0> LOC=M1 | IOSTANDARD = LVCMOS33;
Net LATCH_IN<1> LOC=M4 | IOSTANDARD = LVCMOS33;
Net LATCH_IN0 LOC=M1 | IOSTANDARD = LVCMOS33;
Net LATCH_IN1 LOC=M4 | IOSTANDARD = LVCMOS33;

###################
### PDI general ###
###################
Net PDI_WD_TRIG LOC=R1 | IOSTANDARD = LVCMOS33;
Net PDI_SOF LOC=P1 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PDI_WD_STATE LOC=F12 | IOSTANDARD = LVCMOS33;

### Ports A-F bitwise ###
Net PORT_A0 LOC=G16 | IOSTANDARD = LVCMOS33;
Net PORT_A1 LOC=G15 | IOSTANDARD = LVCMOS33;
Net PORT_A2 LOC=H15 | IOSTANDARD = LVCMOS33;
Net PORT_A3 LOC=J16 | IOSTANDARD = LVCMOS33;
Net PORT_A4 LOC=K16 | IOSTANDARD = LVCMOS33;
Net PORT_A5 LOC=K15 | IOSTANDARD = LVCMOS33;
Net PORT_A6 LOC=L15 | IOSTANDARD = LVCMOS33;
Net PORT_A7 LOC=M16 | IOSTANDARD = LVCMOS33;

Net PORT_B0 LOC=N15 | IOSTANDARD = LVCMOS33;
Net PORT_B1 LOC=N16 | IOSTANDARD = LVCMOS33;
Net PORT_B2 LOC=P16 | IOSTANDARD = LVCMOS33;
Net PORT_B3 LOC=P15 | IOSTANDARD = LVCMOS33;
Net PORT_B4 LOC=R16 | IOSTANDARD = LVCMOS33;
Net PORT_B5 LOC=R15 | IOSTANDARD = LVCMOS33;
Net PORT_B6 LOC=P13 | IOSTANDARD = LVCMOS33;
Net PORT_B7 LOC=N12 | IOSTANDARD = LVCMOS33;

Net PORT_C0 LOC=P12 | IOSTANDARD = LVCMOS33;
Net PORT_C1 LOC=P11 | IOSTANDARD = LVCMOS33;
Net PORT_C2 LOC=R11 | IOSTANDARD = LVCMOS33;
Net PORT_C3 LOC=P10 | IOSTANDARD = LVCMOS33;
Net PORT_C4 LOC=R10 | IOSTANDARD = LVCMOS33;
Net PORT_C5 LOC=P8 | IOSTANDARD = LVCMOS33;
Net PORT_C6 LOC=T8 | IOSTANDARD = LVCMOS33;
Net PORT_C7 LOC=N7 | IOSTANDARD = LVCMOS33;

Net PORT_D0 LOC=P7 | IOSTANDARD = LVCMOS33;
Net PORT_D1 LOC=N6 | IOSTANDARD = LVCMOS33;
Net PORT_D2 LOC=P6 | IOSTANDARD = LVCMOS33;
Net PORT_D3 LOC=R6 | IOSTANDARD = LVCMOS33;
Net PORT_D4 LOC=T5 | IOSTANDARD = LVCMOS33;
Net PORT_D5 LOC=R4 | IOSTANDARD = LVCMOS33;
Net PORT_D6 LOC=T4 | IOSTANDARD = LVCMOS33;
Net PORT_D7 LOC=R2 | IOSTANDARD = LVCMOS33;

Net PORT_E0 LOC=R1 | IOSTANDARD = LVCMOS33;
Net PORT_E1 LOC=P2 | IOSTANDARD = LVCMOS33;
Net PORT_E2 LOC=P1 | IOSTANDARD = LVCMOS33;
Net PORT_E3 LOC=N1 | IOSTANDARD = LVCMOS33;
Net PORT_E4 LOC=M1 | IOSTANDARD = LVCMOS33;
Net PORT_E5 LOC=M4 | IOSTANDARD = LVCMOS33;
Net PORT_E6 LOC=L3 | IOSTANDARD = LVCMOS33;
Net PORT_E7 LOC=L2 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PORT_F0 LOC=G14 | IOSTANDARD = LVCMOS33;
Net PORT_F1 LOC=F12 | IOSTANDARD = LVCMOS33;
Net PORT_F2 LOC=H14 | IOSTANDARD = LVCMOS33;
Net PORT_F3 LOC=L14 | IOSTANDARD = LVCMOS33;
Net PORT_F4 LOC=K14 | IOSTANDARD = LVCMOS33;
Net PORT_F5 LOC=J14 | IOSTANDARD = LVCMOS33;

### Ports A-F in byte groups ###
Net PORT_A<0> LOC=G16 | IOSTANDARD = LVCMOS33;
Net PORT_A<1> LOC=G15 | IOSTANDARD = LVCMOS33;
Net PORT_A<2> LOC=H15 | IOSTANDARD = LVCMOS33;
Net PORT_A<3> LOC=J16 | IOSTANDARD = LVCMOS33;
Net PORT_A<4> LOC=K16 | IOSTANDARD = LVCMOS33;
Net PORT_A<5> LOC=K15 | IOSTANDARD = LVCMOS33;
Net PORT_A<6> LOC=L15 | IOSTANDARD = LVCMOS33;
Net PORT_A<7> LOC=M16 | IOSTANDARD = LVCMOS33;

Net PORT_B<0> LOC=N15 | IOSTANDARD = LVCMOS33;
Net PORT_B<1> LOC=N16 | IOSTANDARD = LVCMOS33;
Net PORT_B<2> LOC=P16 | IOSTANDARD = LVCMOS33;
Net PORT_B<3> LOC=P15 | IOSTANDARD = LVCMOS33;
Net PORT_B<4> LOC=R16 | IOSTANDARD = LVCMOS33;
Net PORT_B<5> LOC=R15 | IOSTANDARD = LVCMOS33;
Net PORT_B<6> LOC=P13 | IOSTANDARD = LVCMOS33;
Net PORT_B<7> LOC=N12 | IOSTANDARD = LVCMOS33;

Net PORT_C<0> LOC=P12 | IOSTANDARD = LVCMOS33;
Net PORT_C<1> LOC=P11 | IOSTANDARD = LVCMOS33;
Net PORT_C<2> LOC=R11 | IOSTANDARD = LVCMOS33;
Net PORT_C<3> LOC=P10 | IOSTANDARD = LVCMOS33;
Net PORT_C<4> LOC=R10 | IOSTANDARD = LVCMOS33;
Net PORT_C<5> LOC=P8 | IOSTANDARD = LVCMOS33;
Net PORT_C<6> LOC=T8 | IOSTANDARD = LVCMOS33;
Net PORT_C<7> LOC=N7 | IOSTANDARD = LVCMOS33;

Net PORT_D<0> LOC=P7 | IOSTANDARD = LVCMOS33;
Net PORT_D<1> LOC=N6 | IOSTANDARD = LVCMOS33;
Net PORT_D<2> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PORT_D<3> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PORT_D<4> LOC=T5 | IOSTANDARD = LVCMOS33;
Net PORT_D<5> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PORT_D<6> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PORT_D<7> LOC=R2 | IOSTANDARD = LVCMOS33;

Net PORT_E<0> LOC=R1 | IOSTANDARD = LVCMOS33;
Net PORT_E<1> LOC=P2 | IOSTANDARD = LVCMOS33;
Net PORT_E<2> LOC=P1 | IOSTANDARD = LVCMOS33;
Net PORT_E<3> LOC=N1 | IOSTANDARD = LVCMOS33;
Net PORT_E<4> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PORT_E<5> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PORT_E<6> LOC=L3 | IOSTANDARD = LVCMOS33;
Net PORT_E<7> LOC=L2 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PORT_F<0> LOC=G14 | IOSTANDARD = LVCMOS33;
Net PORT_F<1> LOC=F12 | IOSTANDARD = LVCMOS33;
Net PORT_F<2> LOC=H14 | IOSTANDARD = LVCMOS33;
Net PORT_F<3> LOC=L14 | IOSTANDARD = LVCMOS33;
Net PORT_F<4> LOC=K14 | IOSTANDARD = LVCMOS33;
Net PORT_F<5> LOC=J14 | IOSTANDARD = LVCMOS33;

### Ports A-F in word groups ###
Net PORT_A_B<0>  LOC=G16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<1>  LOC=G15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<2>  LOC=H15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<3>  LOC=J16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<4>  LOC=K16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<5>  LOC=K15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<6>  LOC=L15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<7>  LOC=M16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<8>  LOC=N15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<9>  LOC=N16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<10> LOC=P16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<11> LOC=P15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<12> LOC=R16 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<13> LOC=R15 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<14> LOC=P13 | IOSTANDARD = LVCMOS33;
Net PORT_A_B<15> LOC=N12 | IOSTANDARD = LVCMOS33;

Net PORT_C_D<0>  LOC=P12 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<1>  LOC=P11 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<2>  LOC=R11 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<3>  LOC=P10 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<4>  LOC=R10 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<5>  LOC=P8 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<6>  LOC=T8 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<7>  LOC=N7 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<8>  LOC=P7 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<9>  LOC=N6 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<10> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<11> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<12> LOC=T5 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<13> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<14> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PORT_C_D<15> LOC=R2 | IOSTANDARD = LVCMOS33;

Net PORT_E_F<0> LOC=R1 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<1> LOC=P2 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<2> LOC=P1 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<3> LOC=N1 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<4> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<5> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<6> LOC=L3 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<7> LOC=L2 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PORT_E_F<8> LOC=G14 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<9> LOC=F12 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<10> LOC=H14 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<11> LOC=L14 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<12> LOC=K14 | IOSTANDARD = LVCMOS33;
Net PORT_E_F<13> LOC=J14 | IOSTANDARD = LVCMOS33;

### Ports 0-45 ###
Net PORT<0>  LOC=G16 | IOSTANDARD = LVCMOS33;
Net PORT<1>  LOC=G15 | IOSTANDARD = LVCMOS33;
Net PORT<2>  LOC=H15 | IOSTANDARD = LVCMOS33;
Net PORT<3>  LOC=J16 | IOSTANDARD = LVCMOS33;
Net PORT<4>  LOC=K16 | IOSTANDARD = LVCMOS33;
Net PORT<5>  LOC=K15 | IOSTANDARD = LVCMOS33;
Net PORT<6>  LOC=L15 | IOSTANDARD = LVCMOS33;
Net PORT<7>  LOC=M16 | IOSTANDARD = LVCMOS33;
Net PORT<8>  LOC=N15 | IOSTANDARD = LVCMOS33;
Net PORT<9>  LOC=N16 | IOSTANDARD = LVCMOS33;
Net PORT<10> LOC=P16 | IOSTANDARD = LVCMOS33;
Net PORT<11> LOC=P15 | IOSTANDARD = LVCMOS33;
Net PORT<12> LOC=R16 | IOSTANDARD = LVCMOS33;
Net PORT<13> LOC=R15 | IOSTANDARD = LVCMOS33;
Net PORT<14> LOC=P13 | IOSTANDARD = LVCMOS33;
Net PORT<15> LOC=N12 | IOSTANDARD = LVCMOS33;
Net PORT<16> LOC=P12 | IOSTANDARD = LVCMOS33;
Net PORT<17> LOC=P11 | IOSTANDARD = LVCMOS33;
Net PORT<18> LOC=R11 | IOSTANDARD = LVCMOS33;
Net PORT<19> LOC=P10 | IOSTANDARD = LVCMOS33;
Net PORT<20> LOC=R10 | IOSTANDARD = LVCMOS33;
Net PORT<21> LOC=P8 | IOSTANDARD = LVCMOS33;
Net PORT<22> LOC=T8 | IOSTANDARD = LVCMOS33;
Net PORT<23> LOC=N7 | IOSTANDARD = LVCMOS33;
Net PORT<24> LOC=P7 | IOSTANDARD = LVCMOS33;
Net PORT<25> LOC=N6 | IOSTANDARD = LVCMOS33;
Net PORT<26> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PORT<27> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PORT<28> LOC=T5 | IOSTANDARD = LVCMOS33;
Net PORT<29> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PORT<30> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PORT<31> LOC=R2 | IOSTANDARD = LVCMOS33;
Net PORT<32> LOC=R1 | IOSTANDARD = LVCMOS33;
Net PORT<33> LOC=P2 | IOSTANDARD = LVCMOS33;
Net PORT<34> LOC=P1 | IOSTANDARD = LVCMOS33;
Net PORT<35> LOC=N1 | IOSTANDARD = LVCMOS33;
Net PORT<36> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PORT<37> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PORT<38> LOC=L3 | IOSTANDARD = LVCMOS33;
Net PORT<39> LOC=L2 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PORT<40> LOC=G14 | IOSTANDARD = LVCMOS33;
Net PORT<41> LOC=F12 | IOSTANDARD = LVCMOS33;
Net PORT<42> LOC=H14 | IOSTANDARD = LVCMOS33;
Net PORT<43> LOC=L14 | IOSTANDARD = LVCMOS33;
Net PORT<44> LOC=K14 | IOSTANDARD = LVCMOS33;
Net PORT<45> LOC=J14 | IOSTANDARD = LVCMOS33;

#######################
### Digital I/O PDI ###
#######################
Net PDI_DIGI_DATA_IN0<0> LOC=G16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<1> LOC=G15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<2> LOC=H15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<3> LOC=J16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<4> LOC=K16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<5> LOC=K15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<6> LOC=L15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN0<7> LOC=M16 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_IN1<0> LOC=N15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<1> LOC=N16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<2> LOC=P16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<3> LOC=P15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<4> LOC=R16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<5> LOC=R15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<6> LOC=P13 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN1<7> LOC=N12 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_IN2<0> LOC=P12 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<1> LOC=P11 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<2> LOC=R11 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<3> LOC=P10 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<4> LOC=R10 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<5> LOC=P8 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<6> LOC=T8 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN2<7> LOC=N7 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_IN3<0> LOC=P7 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<1> LOC=N6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<2> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<3> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<4> LOC=T5 | IOSTANDARD =u LVCMOS33;
Net PDI_DIGI_DATA_IN3<5> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<6> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_IN3<7> LOC=R2 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_OUT0<0> LOC=G16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<1> LOC=G15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<2> LOC=H15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<3> LOC=J16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<4> LOC=K16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<5> LOC=K15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<6> LOC=L15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT0<7> LOC=M16 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_OUT1<0> LOC=N15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<1> LOC=N16 | IOSTANDARD = LVCMOS33;s
Net PDI_DIGI_DATA_OUT1<2> LOC=P16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<3> LOC=P15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<4> LOC=R16 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<5> LOC=R15 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<6> LOC=P13 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT1<7> LOC=N12 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_OUT2<0> LOC=P12 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<1> LOC=P11 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<2> LOC=R11 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<3> LOC=P10 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<4> LOC=R10 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<5> LOC=P8 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<6> LOC=T8 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT2<7> LOC=N7 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_DATA_OUT3<0> LOC=P7 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<1> LOC=N6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<2> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<3> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<4> LOC=T5 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<5> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<6> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_DATA_OUT3<7> LOC=R2 | IOSTANDARD = LVCMOS33;

Net PDI_DIGI_OUTVALID LOC=P2 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_EEPROM_LOADED LOC=N1 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_SYNC_LATCH<0> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_SYNC_LATCH<1> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_LATCH_IN LOC=L3 | IOSTANDARD = LVCMOS33;
Net PDI_DIGI_OE_EXT LOC=L2 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PDI_DIGI_OE_CONF LOC=G14 | IOSTANDARD = LVCMOS33;


###########
### SPI ###
###########
Net PDI_SPI_CLK	LOC=R1 | IOSTANDARD = LVCMOS33;
Net PDI_SPI_DO LOC=P6 | IOSTANDARD = LVCMOS33;
Net PDI_SPI_IRQ	LOC=T8 | IOSTANDARD = LVCMOS33;

Net PDI_SPI_SEL LOC=R11 | IOSTANDARD = LVCMOS33;
Net PDI_SPI_DI LOC=P7 | IOSTANDARD = LVCMOS33;

# ISE/EDK 10/11/12 without Spartan-6:
#Net PDI_SPI_SEL CLOCK_DEDICATED_ROUTE = FALSE;
#Net PDI_SPI_DI CLOCK_DEDICATED_ROUTE = FALSE;

# ISE/EDK 11.3 with Spartan-6:
#PIN "PDI_SPI_DI_BUFGP.O" CLOCK_DEDICATED_ROUTE = FALSE;
#PIN "PDI_SPI_SEL_BUFGP.O" CLOCK_DEDICATED_ROUTE = FALSE;

# ISE/EDK 11.4-12.4 with Spartan-6:
#PIN "PDI_SPI_DI_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE;
#PIN "PDI_SPI_SEL_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE;

Net PDI_SPI_SYNC_LATCH<0> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PDI_SPI_SYNC_LATCH<1> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PDI_SPI_EEPROM_LOADED LOC=R15 | IOSTANDARD = LVCMOS33;


##########################
### Async. uController ###
##########################
Net PDI_uC_ADR<0> LOC=G16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<1> LOC=G15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<2> LOC=H15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<3> LOC=J16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<4> LOC=K16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<5> LOC=K15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<6> LOC=L15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<7> LOC=M16 | IOSTANDARD = LVCMOS33;		 

Net PDI_uC_ADR<8>  LOC=N15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<9>  LOC=N16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<10> LOC=P16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<11> LOC=P15 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<12> LOC=R16 | IOSTANDARD = LVCMOS33;		 
Net PDI_uC_ADR<13> LOC=P13 | IOSTANDARD = LVCMOS33;

Net PDI_uC_DATA<0> LOC=P12 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<1> LOC=P11 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<2> LOC=R11 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<3> LOC=P10 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<4> LOC=R10 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<5> LOC=P8 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<6> LOC=T8 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<7> LOC=N7 | IOSTANDARD = LVCMOS33;

Net PDI_uC_DATA<8>  LOC=P7 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<9>  LOC=N6 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<10> LOC=P6 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<11> LOC=R6 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<12> LOC=T5 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<13> LOC=R4 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<14> LOC=T4 | IOSTANDARD = LVCMOS33;
Net PDI_uC_DATA<15> LOC=R2 | IOSTANDARD = LVCMOS33;

Net PDI_uC_nCS  LOC=R1 | IOSTANDARD = LVCMOS33;
Net PDI_uC_nRD  LOC=P2 | IOSTANDARD = LVCMOS33;
Net PDI_uC_nWR  LOC=P1 | IOSTANDARD = LVCMOS33;
Net PDI_uC_nBHE LOC=N1 | IOSTANDARD = LVCMOS33;
Net PDI_uC_IRQ	LOC=L3 | IOSTANDARD = LVCMOS33;
Net PDI_uC_BUSY	LOC=L2 | IOSTANDARD = LVCMOS33;

Net PDI_uC_SYNC_LATCH<0> LOC=M1 | IOSTANDARD = LVCMOS33;
Net PDI_uC_SYNC_LATCH<1> LOC=M4 | IOSTANDARD = LVCMOS33;
Net PDI_uC_EEPROM_LOADED LOC=R15 | IOSTANDARD = LVCMOS33;
Net PDI_uC_CPU_CLK_IN LOC=N12 | IOSTANDARD = LVCMOS33;

# FB1130_0A only #
Net PDI_uC_ADR<14> LOC=G14 | IOSTANDARD = LVCMOS33;
Net PDI_uC_ADR<15> LOC=F12 | IOSTANDARD = LVCMOS33;