Hardware/Parallelport/heb synchro

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Synchro

The board was designed for the ETE ELN-synchro lab.

It receives 2 sinewaves: one from a 50 Hz function generator and one from the AC generator. These signals are triggered at 0 V in order to deliver logic-level signals to the FPGA.

The FPGA delivers a PWM output which controls a power switch. The switch then drives the DC motor.

Version Photo Schematics Stock
V1.0 HEB-Synchro HEB-Synchro Schematic PDF 12 fully mounted
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