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  • == Design & Programmer Tools ==
    3 KB (460 words) - 10:44, 12 December 2016
  • * [[Hardware/Stock_Programmer#Digilent_Xilinx_Programmer|Digilent Xilinx Programmer]] #01-#20 with USB cable, converter PCB and ribbon cable * [[Hardware/Stock_Programmer#Digilent_Xilinx_Programmer|Digilent Xilinx Programmer]] #31-#50 with USB cable, converter PCB and ribbon cable
    3 KB (409 words) - 09:44, 2 August 2018
  • * this happens when you unplug the programmer or powercycle the FPGA while a target is open
    601 B (93 words) - 10:36, 2 March 2016
  • The flat cable connects to a programmer board who distributes the JTAG links to device-specific connectors. The following picture shows the S-Band OBC with the programmer board:
    4 KB (691 words) - 14:03, 30 May 2018

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