Components/IP/Ethernet

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This IP's can be found on the EDA Repository: svn: https://repos.hevs.ch/svn/eda/
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These IPs can be found on the EDA Repository: svn: https://repos.hevs.ch/svn/eda/
  
 
There are 2 [http://isi.hevs.ch/switzerland/robust-electronics.html ISI] [[Standards/Ethernet/IPs|Ethernet IP]] systems:
 
There are 2 [http://isi.hevs.ch/switzerland/robust-electronics.html ISI] [[Standards/Ethernet/IPs|Ethernet IP]] systems:

Revision as of 12:27, 14 June 2013

These IPs can be found on the EDA Repository: svn: https://repos.hevs.ch/svn/eda/

There are 2 ISI Ethernet IP systems:

Both designs come in 3 blocks:

  • a MII to dual port RAM interface
  • a protocol decoder which retrieves the payload from the complete frame
  • the application part where the user places one block for each function (protocol) to implement
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