Hardware/FPGAEBS/Configuration

General

After designing and simulating your design based on VHDL Template Design, you have to prepare it:

1. In HDL-Designer: Perform Task Flow Prepare for Synthesis
   1. Generates all VHDL Files
   2. Concatenates them into a single VHDL File
   3. Trims work libraries
2. In HDL-Designer: Perform Task Flow Xilinx Project Navigator
   1. Updates the ISE (*.xise) Project file
   2. Launches ISE
3. In ISE: Perform Task Generate Programming File
   1. Runs Synthesis
   2. Runs P&R
   3. Generate Programming File *.bit
4. In ISE: Perform Task Configure Target Device
   1. Launches Impact

After that you can either way download the file directly to the FPGA or create another file to download to the non-volatile memory.

Flash Writing

To program the xcf04s Platform Flash In-System Programmable Configuration PROM you need to turn your *.bit into an *.mcs file. This file can then be used to program the Platform Flash through JTAG.

Flash programming works ONLY with Official Xilinx USB Programmer

Create Flash *.mcs File

1. Choose Task Create PROM File

   

2. Dialog File PROM Formatter opens
   1. Choose Xilinx Flash/PROM
   2. Click the first green arrow
   3. Choose Device (bits) xcf04s [4M]
   4. Click Add Storage Device
   5. Click the second green arrow
   6. Choose your Output File Name
   7. Choose your Output File Location
   8. Click OK