Hardware/FPGAPoetic

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The basic idea behind this board is to have a FPGA board that interface a VME connector compatible with the POETIC Rack backplane.
 
The basic idea behind this board is to have a FPGA board that interface a VME connector compatible with the POETIC Rack backplane.
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This board was developped during [https://gitlab.hevs.ch/theses/bachelor/jean-nanchen/fpga-developing-board-demonstrator Jean Nanchen's TB] (2021) and used in the NGRW project in addition with the [[Hardware/Mezzanine/Poetic|FPGA ADC-DAC Mezzanine]].
  
 
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Revision as of 12:59, 1 October 2021

Contents

The basic idea behind this board is to have a FPGA board that interface a VME connector compatible with the POETIC Rack backplane. This board was developped during Jean Nanchen's TB (2021) and used in the NGRW project in addition with the FPGA ADC-DAC Mezzanine.

Type FPGA Poetic Schematic UCF Description
V1.0 FPGA Poetic V1.0 FPGA-Poetic v1.0 Schematic PDF FPGA-Rack v1.0 UCF Files There are different FPGA mounted: Spartan 6 XC6SLX45, Spartan 6 XC6SLX100, Spartan 6 XC6SLX150

The boards are compatible with the FPGA Rack Backplane for interconnecting different boards with the help of the HES-SO Backplane Bus and the HES-SO VME IP Core.

A VHDL test code with the default UCF Files can be found at the EDA SVN Repository:

Features

  • 1 Ethernet Port
  • USB FTDI
  • Spartan 6 LX45 - LX100 - LX150
  • 2x4 Leds
  • 4 User Switches
  • 3 Buttons
  • 106.25MHz Main Clock
  • VME connector 3x32Pin compatible with POETIC Rack backplane
  • 2 Mezzanine Connector ARM-EBS and FPGA-EBS compatible
  • Powered by USB or VME Power

Programmation

V1.0 is only programmable via JTAG.

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