Hardware/FPGARackHiRADDAV1

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= Known issues =
 
= Known issues =
* 0402 100Ohms LVDS termination resistors must be added under the FPGA between pins E18-D18 and H17-H18 in order to use the DDR3 chips. If not used, the outputs DDR3-FPGA_CLK0P/N and DDR3-FPGA_CLK1P/N from the AD9517-4 must be disabled !
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* None.
  
 
[[Category:Hardware]] [[Category:FPGARack]]
 
[[Category:Hardware]] [[Category:FPGARack]]

Revision as of 12:54, 15 September 2015

Contents

XXThe main purpose behind this board is to have a powerful development FPGA board specialized in high-resolution data acquisition and processing.

Type FPGA Rack Documentation Description
V1.0
Restricted access
Full documentation
Kintex7 XC7K160T-2FFG676

The HiRADDA set is composed of two boards : HiRADDA Core and HiRADDA Mezzanine.

HiSADDA is compatible with the FPGA Rack Backplane for interconnecting different boards with the help of the HVME16 version of the HES-SO Backplane Bus and the HES-SO VME IP Core.

Core features

Main board

  • 4x A/D 24bits 4MSPS with 2 analog paths :
    • Direct (differential - BW DC..1GHz)
    • Through operationnal amplifier
  • 1x Xilinx Kintex7 XC7K160T-2FFG676
    • 162.24k logic cells, 25.35k slices (max 2.188Mb of distributed RAM)
    • 11.7Mb block RAM (650x18Kb / 325x36Kb)
    • 600 DSP Slices
    • GTX
  • 1x 100MHz quartz for work clock
  • 2x SATA connector (for general purpose gigabit link - expermiental)
  • 1x SSRAM (total: 4/8MiB, xxbit width)
  • 2x 32MiB Serial QuadSPI NOR Flash (one reserved for FPGA programming)
  • nx user LEDs
  • nx user DIL Switches
  • 1x JTAG Connector
  • 1x DIN41612 VME Compatible Connector 3x32 pins (only HVME16) with CMOS AC termination on all signal pins (unsoldered - expermiental)
  • 1x Low-jitter clock generator/distributor
  • 1x external clock input

Mezzanine board

  • 2x D/A 16bits xxxMSPS (Analog Devices AD9726), current source, with 2 analog paths :
    • Direct (differential - BW DC..200MHz)
    • Through balun/aop
  • 1x USB2 (micro USB connector, FTDI FT232HL)
  • 1x power supply

Power supply considerations

The following power rails are produced on board :

  • +A5.0V (ADS1675)
  • +D1.0V (FPGA Core)
  • +D2.5V (SSRAM + FPGA BANK)
  • +D3.0V (ADS1675 + FPGA BANK)
  • +D3.3V (VME + FPGA BANK)

VME connector logic levels

The I/O bank which interfaces the VME connector is only 3.3V. Be careful with other FPGA Rack boards with 2.5V/3.3V jumper.

Programmation

This board can be programmed in 2 ways,

  • First the FPGA can be directly programmed.
  • Second the FPGA can be programmed via the onboard Flash memory (SPI x1/x4).

More explanation for FLASH programmation are available here.

Known issues

  • None.
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