Hardware/Mezzanine/high-speed AD-DA
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| + | <span style="color:#FF0000"> '''Warning :''' </span> <span style="color:#800000"> This board is deprecated. See [[Hardware/FPGARackADDAV1|OLGMADDA]] and [[Hardware/FPGARackHiRADDAV1|HiRADDA]] boards. </span> | ||
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== High-speed AD/DA mezzanine board == | == High-speed AD/DA mezzanine board == | ||
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| + | [[File:FPGA_Mezza_Highspeed_ADDA.jpg|200px|Highspeed AD-DA Mezzanine]] | ||
This board has been developed for the MOLIS and IGOR projects. | This board has been developed for the MOLIS and IGOR projects. | ||
Latest revision as of 16:50, 7 November 2016
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Warning : This board is deprecated. See OLGMADDA and HiRADDA boards.
High-speed AD/DA mezzanine board
This board has been developed for the MOLIS and IGOR projects. It features:
- two 24-bit, 2.5 MSPS AD7760 ADCs
- two 16-bit, 10 MSPS AD7626 ADCs
- one 16-bit, 6.8MHz, dual output AD5547 DAC
