Languages
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* [[Languages/UVM/Definition|Universal Verification Methodology]] | * [[Languages/UVM/Definition|Universal Verification Methodology]] | ||
* [[Languages/UVM/Links|Universal Verification Methodology Links]] | * [[Languages/UVM/Links|Universal Verification Methodology Links]] | ||
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| + | == SpinalHDL == | ||
| + | * [https://github.com/SpinalHDL Official git repositories] | ||
| + | * [https://spinalhdl.github.io/SpinalDoc SpinalHDL documentation / examples] | ||
== Scripting == | == Scripting == | ||
Revision as of 14:45, 30 May 2016
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Knowledge Database of Languages used in the field of Infotronics
All Languages
Advice valid in most languages
VHDL
Tcl_Tk
SystemVerilog
- System Verilog Syntax
- System Verilog Libraries
- System Verilog Links
- Universal Verification Methodology
- Universal Verification Methodology Links
SpinalHDL
Scripting
C/C++
- Portable integer types
- Unsorted various tips, tricks and traps
- How to split source and header file
- Sections explained
- Trust your compiler
Scala
Useful command lines examples (unix shell)
- Finding files and inside files :
find - Finding a ssh host :
nmap - Finding a machine on the network :
arp-scan - Using file system images in Linux
