Projects

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=== PTP ===
 
=== PTP ===
Defining the synchronisation algorithm of aslave clock to a master clock  with the [[Standards/Ethernet_PTP|IEEE Std 1588 - Precision Time Protocol]] protocol.
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Defining the synchronisation algorithm of a slave clock to a master clock  with the [[Standards/Ethernet_PTP|IEEE Std 1588 - Precision Time Protocol]] protocol.
* [[Projects/PTP|PTP Project]] (access restricted to project members)
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* [[Projects/PTP-intern|internal Applied research project]]
 
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* [[Projects/PTP|industry project]] (access restricted to project members)
=== PTP-intern ===
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An internal research project on the [[Standards/Ethernet_PTP|IEEE Std 1588 - Precision Time Protocol]].
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* [[Projects/PTP-intern|PTP-intern Project]]
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=== EzCat ===
 
=== EzCat ===

Revision as of 12:18, 28 February 2014

Contents

Here you can find a list of Infotronics projects carried out at the HES-SO Valais Wallis

HDL

EDA

EDA is a collection of libraries, IPs and template designs maintained and used at HES-SO Valais Wallis.

BasMI

Internal Ra&D Project for a more unified "Base Measurement Instrumentation"

PTP

Defining the synchronisation algorithm of a slave clock to a master clock with the IEEE Std 1588 - Precision Time Protocol protocol.

EzCat

Project in collaboration with HEIG-VD

AMBAdraw (a.k.a. AMBArchitect)

Graphical user interface (GUI) for GRLIB-AMBA

Math2Mat

Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.

Microcone

An intelligent Microphone to record group conversations

MAC IP

An Ethernet Transceiver IP for FPGA

FPGA-EBS

HES-SO//Vs FPGA Development Board

USBCypress

This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip

Telecom

Nothing yet

Embedded Systems

Swiss Cube

SAMS2

In collaboration with UNIL and EPFL

Diploma works

Check-out the diploma works of our former students.

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