Projects
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= EDA = | = EDA = | ||
| − | == PTP == | + | === PTP === |
An internal research project on the [[Standards/Ethernet_PTP|IEEE Std 1588 - Precision Time Protocol]]. | An internal research project on the [[Standards/Ethernet_PTP|IEEE Std 1588 - Precision Time Protocol]]. | ||
| − | == EzCat == | + | === EzCat === |
Project in collaboration with HEIG-VD | Project in collaboration with HEIG-VD | ||
* [[Projects/EzCat|EzCat Project]] | * [[Projects/EzCat|EzCat Project]] | ||
* [https://projects.hevs.ch/index.php?path_info=projects%2F46 Active Collab EzCat] | * [https://projects.hevs.ch/index.php?path_info=projects%2F46 Active Collab EzCat] | ||
| − | == AMBAdraw (a.k.a. AMBArchitect) == | + | === AMBAdraw (a.k.a. AMBArchitect) === |
Graphical user interface (GUI) for GRLIB-AMBA | Graphical user interface (GUI) for GRLIB-AMBA | ||
* [http://ambadraw.hevs.ch Webpage] | * [http://ambadraw.hevs.ch Webpage] | ||
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* [http://isi.hevs.ch/valais/ambarchitect.html ISI Project Page] | * [http://isi.hevs.ch/valais/ambarchitect.html ISI Project Page] | ||
| − | == Math2Mat == | + | === Math2Mat === |
Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog. | Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog. | ||
* [http://www.math2mat.ch/ Webpage] | * [http://www.math2mat.ch/ Webpage] | ||
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* [https://svn.lii.eig.ch/trac/math2mat/wiki Trac] | * [https://svn.lii.eig.ch/trac/math2mat/wiki Trac] | ||
| − | == Microcone == | + | === Microcone === |
An intelligent Microphone to record group conversations | An intelligent Microphone to record group conversations | ||
* [http://isi.hevs.ch/valais/microcone.html ISI Project Page] | * [http://isi.hevs.ch/valais/microcone.html ISI Project Page] | ||
| − | == MAC IP == | + | === MAC IP === |
An Ethernet Transceiver IP for FPGA | An Ethernet Transceiver IP for FPGA | ||
* [http://isi.hevs.ch/valais/mac.html ISI Project Page] | * [http://isi.hevs.ch/valais/mac.html ISI Project Page] | ||
| − | == FPGA-EBS == | + | === FPGA-EBS === |
HES-SO//Vs [[Hardware/FPGAEBS|FPGA Development Board]] | HES-SO//Vs [[Hardware/FPGAEBS|FPGA Development Board]] | ||
* [http://isi.hevs.ch/valais/fpga-board.html ISI Project Page] | * [http://isi.hevs.ch/valais/fpga-board.html ISI Project Page] | ||
| − | == USBCypress == | + | === USBCypress === |
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip | This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip | ||
* [https://svn.hevs.ch/trac/usbcypress USB Cypress Trac Wiki] <-- deprecated | * [https://svn.hevs.ch/trac/usbcypress USB Cypress Trac Wiki] <-- deprecated | ||
| − | |||
= Telecom = | = Telecom = | ||
| + | Nothing yet | ||
= Embedded Systems = | = Embedded Systems = | ||
| − | == Swiss Cube == | + | === Swiss Cube === |
* [http://isi.hevs.ch/valais/swisscube.html ISI Project Page] | * [http://isi.hevs.ch/valais/swisscube.html ISI Project Page] | ||
Revision as of 13:06, 8 June 2012
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Here you can find a list of Infotronics projects carried out at the HES-SO//VS
EDA
PTP
An internal research project on the IEEE Std 1588 - Precision Time Protocol.
EzCat
Project in collaboration with HEIG-VD
AMBAdraw (a.k.a. AMBArchitect)
Graphical user interface (GUI) for GRLIB-AMBA
Math2Mat
Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.
Microcone
An intelligent Microphone to record group conversations
MAC IP
An Ethernet Transceiver IP for FPGA
FPGA-EBS
HES-SO//Vs FPGA Development Board
USBCypress
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip
- USB Cypress Trac Wiki <-- deprecated
Telecom
Nothing yet
