Projects
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Project in collaboration with HEIG-VD | Project in collaboration with HEIG-VD | ||
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[[Category:Projects]] | [[Category:Projects]] | ||
Revision as of 13:09, 2 April 2012
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Here you can find a list of EDA projects carried out at the HES-SO//VS
USBCypress
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip
AMBAdraw (a.k.a. AMBArchitect)
Graphical user interface (GUI) for GRLIB-AMBA
Math2Mat
Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.
Microcone
An intelligent Microphone to record group conversations
MAC IP
An Ethernet Transceiver IP for FPGA
FPGA-EBS
FPGA Development Card
Swiss Cube
EzCat
Project in collaboration with HEIG-VD
