Projects
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| − | + | ''' Here you can find a list of EDA projects carried out at the HES-SO//VS ''' | |
== USBCypress == | == USBCypress == | ||
Revision as of 15:18, 7 February 2012
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Here you can find a list of EDA projects carried out at the HES-SO//VS
USBCypress
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip
AMBAdraw (a.k.a. AMBArchitect)
Graphical user interface (GUI) for GRLIB-AMBA
Math2Mat
Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.
