Kart/DC motor controller
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== FPGA design == | == FPGA design == | ||
| − | The DC motor controller has to | + | [[File:Kart_dc_block.jpg|right|600px|dc motor block]] |
| − | The <code>speed</code> is set in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor speed register]], | + | |
| − | prescaler in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor prescaler register]] with the formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler). | + | The DC motor controller has to control the Kart's propulsion both in forward and reverse. |
| + | |||
| + | For this, two signals are generated : | ||
| + | * A <code>pwm</code> with a controllable frequency whose [https://en.wikipedia.org/wiki/Duty_cycle duty-cycle] is modified to control the speed | ||
| + | * A <code>forwards</code> signal to drive either forward or backward. | ||
| + | |||
| + | The <code>speed</code> is set in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor speed register]], ranging from <code>-15 to 15</code>. | ||
| + | |||
| + | The frequency is given by the <code>prescaler</code> in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor prescaler register]] with the | ||
| + | formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler). | ||
To begin with, the [[Kart#FPGA_Design|design environment]] has to be downloaded, | To begin with, the [[Kart#FPGA_Design|design environment]] has to be downloaded, | ||
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The block receives a <code>speed</code> signed number and has to drive the DC motor with a <code>pwm</code> and a <code>forwards</code> signal. | The block receives a <code>speed</code> signed number and has to drive the DC motor with a <code>pwm</code> and a <code>forwards</code> signal. | ||
| + | |||
These signals are internally converted to two driving signals to control an [http://en.wikipedia.org/wiki/H_bridge H-bridge] | These signals are internally converted to two driving signals to control an [http://en.wikipedia.org/wiki/H_bridge H-bridge] | ||
(they take into account the dead-times to avoid short-circuiting the motor while switching). | (they take into account the dead-times to avoid short-circuiting the motor while switching). | ||
| − | The mean amplitude of the DC motor's voltage is controlled by a [http://en.wikipedia.org/wiki/Pulse-width_modulation Pulse Width Modulation] (PWM). | + | The mean amplitude of the DC motor's voltage is controlled by a [http://en.wikipedia.org/wiki/Pulse-width_modulation Pulse Width Modulation] (PWM): |
| + | * The <code>forwards</code> signal is derived from the sign of the <code>speed</code> control. | ||
| + | * The <code>pwm</code> signal is derived from the absolute value of <code>speed</code>. | ||
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{{WarningBox|content= | {{WarningBox|content= | ||
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}} | }} | ||
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| − | The minimal value of the PWM signal is studied in another part of the [[Kart| | + | The minimal value of the PWM signal is studied in another part of the [[Kart|project]]. |
The period of the <code>en</code> pulse train is set in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor PWM period register]] | The period of the <code>en</code> pulse train is set in the [[Kart/serial_link#SmartPhone_to_Kart|DC motor PWM period register]] | ||
and given by the formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler). | and given by the formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler). | ||
| + | |||
| + | {{TaskBox|content= | ||
| + | Draw the schematics of the <code>dcMotorPwm</code> block. | ||
| + | }} | ||
=== Hardware orientation === | === Hardware orientation === | ||
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In order to cope with this, a control signal, <code>btConnected</code>, is provided to the block. | In order to cope with this, a control signal, <code>btConnected</code>, is provided to the block. | ||
When <code>btConnected</code> is '0', the DC motor must stop. | When <code>btConnected</code> is '0', the DC motor must stop. | ||
| + | |||
| + | The BT connection bit is configured in the [[Kart/serial_link#Hardware_control_register|hardware control register]]. | ||
{{TaskBox|content= | {{TaskBox|content= | ||
Update the schematics of the <code>dcMotorPwm</code> block in order to stop the motor on connection loss. | Update the schematics of the <code>dcMotorPwm</code> block in order to stop the motor on connection loss. | ||
}} | }} | ||
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[[Category:Kart]] | [[Category:Kart]] | ||
Revision as of 10:48, 4 July 2022
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DC motor
The DC motor is a Modelcraft RB350018-2A723R.
It is powered in 12 V and draws a maximal current of 0.7 A.
The control board hosts a dual full-bridge and a circuitry to create the switching dead-times and the direction of the current.
FPGA design
The DC motor controller has to control the Kart's propulsion both in forward and reverse.
For this, two signals are generated :
- A
pwmwith a controllable frequency whose duty-cycle is modified to control the speed - A
forwardssignal to drive either forward or backward.
The speed is set in the DC motor speed register, ranging from -15 to 15.
The frequency is given by the prescaler in the DC motor prescaler register with the
formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler).
To begin with, the design environment has to be downloaded,
which contains the registers and events manager and an empty dcMotorPwm block which is to be completed.
Functionality
The block receives a speed signed number and has to drive the DC motor with a pwm and a forwards signal.
These signals are internally converted to two driving signals to control an H-bridge (they take into account the dead-times to avoid short-circuiting the motor while switching).
The mean amplitude of the DC motor's voltage is controlled by a Pulse Width Modulation (PWM):
- The
forwardssignal is derived from the sign of thespeedcontrol. - The
pwmsignal is derived from the absolute value ofspeed.
The PWM signal is implemented with the help of a free-running counter and a comparator. However:
- the power transistors cannot switch at too high frequencies
- there is a need for a dead time where all power transistors are open between the PWM transitions
Because of this, the PWM period is limited to a certain value. This is achieved with the help of an en signal generated by a counter dividing the clock frequency. The counter only increments when this signal is '1'.
The minimal value of the PWM signal is studied in another part of the project.
The period of the en pulse train is set in the DC motor PWM period register
and given by the formula f = fclk / (PWMsteps * prescaler) = 10M / (16 * prescaler).
Hardware orientation
The mechanical design can either lead the Kart to drive forwards or backwards when a positive voltage is applied to the DC motor.
In order to cope with this, a setup signal, normalDirection, is provided to the block.
normalDirection being '1' means that a positive voltage applied to the DC motor lets the kart drive forwards.
The setup bit is configured in the hardware control register.
Bluetooth connection
When the Bluetooth connection is lost, the DC motor should not turn.
In order to cope with this, a control signal, btConnected, is provided to the block.
When btConnected is '0', the DC motor must stop.
The BT connection bit is configured in the hardware control register.
