Kart/Daughterboard

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The FPGA daughterboard embedds an Igloo AGLN250 chip in a VQ100 package, driven by a 10 MHz clock.

Kart daughterboard

Power

The board is powered either through an USB-C connector (+5V, providing a JTAG access along an USB-UART converter) or through the motherboard via an external +5V rail.

It will automatically resolve the path if both supplies are wired simultaneously, choosing the motherboard +5V rail in priority.

Internally, it will create a +3.3V rail used by both the FPGA and the motherboard, plus another +1.5V rail for the FPGA core supply.

Programming

The board can be programmed through its USB-C connector with the help of OpenOCD and some custom scripts.

But for now, a Microsemi FlashPro 4 can be plugged into the 10 pins and used with the Libero IDE.

Both the USB and the FlashPro can be plugged at the same time. The FlashPro gains priority over the USB JTAG signals.

Dialog-warning.png

If the daughterboard is not plugged into a powered motherboard, it is necessary to plug both the USB-C and the FlashPro to be able to program it via the FlashPro. Else, the FPGA will have no power.

If extra JTAG chips are present on the motherboard, the latter enables an extra signal which will re-root the JTAG lines through the motherboard. It is not the case in the Kart project for now.

Connection with the mobo

The board is linked to the motherboard through an SODIMM-200 connector (the 200 gold fingers on the FPGA board). By design, it cannot be inserted the wrong way.

The connector pining is shown here.

I/Os

Reset

A button is found on the board to reset the FPGA. Be careful when pushing it while it is inserted in a motherboard (do not force on the SODIMM connector).

LEDs

A LED indicates that the board is powered (top right of the board), while a second (found near the USB connector) shows in and out transaction over UART.

Red, yellow and green LEDs are found under the power indicator and can be freely controlled by the user.

PoR

The board also embeds a Power on Reset circuitry that will detect low FPGA voltage and reset it (discharged batteries, too high current consumption ...).

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