Hardware/Parallelport/heb inverter

(Difference between revisions)
Jump to: navigation, search
(Inverter board)
Line 13: Line 13:
 
! Version || Photo || Schematics || Stock
 
! Version || Photo || Schematics || Stock
 
|-
 
|-
| V1.0 ||[[File:Heb inverter.jpg|200px|HEB-Synchro]] || [[Media:FPGA_PP_HEB_synchro.pdf|HEB-Synchro Schematic PDF]] || [[Hardware/Stock_PP#HEB_Synchro|16fully mounted]]
+
| V1.0 ||[[File:Heb inverter.jpg|200px|HEB-Synchro]] || [[Media:FPGA PP inverter.pdf|HEB-inverter Schematic PDF]] || [[Hardware/Stock_PP#HEB_Synchro|16fully mounted]]
 
|}
 
|}
  
 
[[Category:Hardware]] [[Category:Parallelport]] [[Category:HEB]]
 
[[Category:Hardware]] [[Category:Parallelport]] [[Category:HEB]]

Revision as of 10:20, 26 November 2021

Contents

Inverter board

The board was designed for the ETE ELN-inverter lab.

It receives 4 PWM signals to drive an H-Bridge. The bridge is followed by an LC-lowpass and a transformer.

A sigma-delta ADC reads the LC filter output and enables to adjust the output voltage.

Version Photo Schematics Stock
V1.0 HEB-Synchro HEB-inverter Schematic PDF 16fully mounted
Personal tools
Namespaces
Variants
Actions
Navigation
Browse
Toolbox