Hardware/Parallelport/heb synchro

From UIT
Revision as of 11:19, 14 October 2021 by Francois.corthay (Talk | contribs)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Contents

Synchro board and assembly

The board was designed for the ETE ELN-synchro lab.

It receives 2 sinewaves: one from a 50 Hz function generator and one from the AC generator. These signals are triggered at 0 V in order to deliver logic-level signals to the FPGA.

The FPGA delivers a PWM output which controls a power switch. The switch then drives the DC motor.

Version Photo Schematics Stock
V2.0 HEB-Synchro HEB-Synchro Schematic PDF 16fully mounted
V1.0 HEB-Synchro HEB-Synchro Schematic PDF 12 fully mounted
Personal tools
Namespaces
Variants
Actions
Navigation
Browse
Toolbox