Components/IP/Ethernet

This IP's can be found on the EDA Repository: svn: https://repos.hevs.ch/svn/eda/

There are 2 ISI Ethernet IP systems:

• the light core with only UDP/IP capabilities
• the full core with additional ARP , ICMP (for ping) and DHCP support

Both designs come in 3 blocks:

• a MII to dual port RAM interface
• a protocol decoder which retrieves the payload from the complete frame
• the application part where the user places one block for each function (protocol) to implement