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= News =
 
= News =
 +
{{NewsBox|''[[Tools/Mentor_Modelsim|Model-]]/[[Tools/Mentor_Questasim|QuestaSim]] 10.4'' is now available on  [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]|2015-03-10|
 +
* Performance improvements for SV, VHDL, HTML and libraries
 +
* New Toolbars  (Edit Preferences)
 +
* discontinued support for Windows XP and Vista}}
 
{{NewsBox|''[https://sourceforge.net/p/winpython WinPython] 2.7.9.3 is now available on [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]|2015-03-02|
 
{{NewsBox|''[https://sourceforge.net/p/winpython WinPython] 2.7.9.3 is now available on [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]|2015-03-02|
 
* new packages: numpy, jsonschema, mistune, ...
 
* new packages: numpy, jsonschema, mistune, ...
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* Runtime and UI improvements
 
* Runtime and UI improvements
 
* ''SoftConsole v3.4 requires the SP1 to be compatible with Libero SoC v11.4''}}
 
* ''SoftConsole v3.4 requires the SP1 to be compatible with Libero SoC v11.4''}}
{{NewsBox|''[[Tools/Mentor_Modelsim|Model-]]/[[Tools/Mentor_Questasim|QuestaSim]] 10.3c'' is now available on  [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]|2014-07-07|
 
* Performance improvements
 
* New Toolbars and Source Window
 
* VHDL-2008 support (if/cas/generate)
 
* Questa only: PA and VM improved}}
 
 
{{NewsBox|''[[Tools/Synopsys_Synplify|Synplify]] [[Tools/Versions#2014.03|2014.3]]'' is now available on  [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]||
 
{{NewsBox|''[[Tools/Synopsys_Synplify|Synplify]] [[Tools/Versions#2014.03|2014.3]]'' is now available on  [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]||
 
* QoR improvements
 
* QoR improvements
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* adds large vector randomization
 
* adds large vector randomization
 
*  has a work around for some Aldec issues}}
 
*  has a work around for some Aldec issues}}
{{NewsBox|''Model-/QuestaSim 10.0f'' is now available on  [[User:Guo|guo]]'s [ftp://fpga:fpga@153.109.5.248 Software Server]||
 
This update brings following new features to the ''10.0'' release:
 
* Improved GUI performance – Improved structure window and objects window
 
* VHDL Improvements - Support for significant portions of VHDL 2008 and Preservation
 
of user case in identifiers
 
* New advanced debug features including schematic view debug and automatic causality
 
tracing
 
* Improved WLF debugging and new Code Coverage Analysis Pane}}
 
 
{{NewsBox|The ''IEEE Std 1800-2012'' a.k.a. ''SystemVerilog'' is available for [http://standards.ieee.org/getieee/1800/download/1800-2012.pdf download]||
 
{{NewsBox|The ''IEEE Std 1800-2012'' a.k.a. ''SystemVerilog'' is available for [http://standards.ieee.org/getieee/1800/download/1800-2012.pdf download]||
 
The '''31 new features''', '''60 clarifications''' and '''71 corrections''' of the standard include:
 
The '''31 new features''', '''60 clarifications''' and '''71 corrections''' of the standard include:

Revision as of 10:20, 10 March 2015

Welcome to the HES-SO Valais Wallis Wiki of the Infotronics Unit

Contents

HESSO Valais Wallis Logo
This is the knowledge database of the HES-SO Valais Wallis Institute of Systems Engineering Infotronics Unit. It's the place to share experiences, findings, how-to's and everything else about HDL, Telecom, Embedded Systems and related topics.

Find more information about our educational program in the FSI Wiki.

link=Help:http://wiki.hevs.ch/uit/index.php?title=Special:RecentChanges&feed=rss Get informed about all changes to this wiki by signing up to this RSS feed

Getting started

Use the Navigation to the left to enter the different sections or follow any of the following links:

News

2015-03-10

Model-/QuestaSim 10.4 is now available on guo's Software Server

  • Performance improvements for SV, VHDL, HTML and libraries
  • New Toolbars (Edit Preferences)
  • discontinued support for Windows XP and Vista

2015-03-02

WinPython 2.7.9.3 is now available on guo's Software Server

  • new packages: numpy, jsonschema, mistune, ...
  • upgraded many packages

2013-12-12

Qt 5.4 including Qt Creator 3.3.0 has been released

Check the Summary of New Features

2014-08-07

Microsemi Libero SoC 11.4 is now available on guo's Software Server

  • Enlarged support for SmartFusion2 and IGLOO2 families
  • Runtime and UI improvements
  • SoftConsole v3.4 requires the SP1 to be compatible with Libero SoC v11.4

Synplify 2014.3 is now available on guo's Software Server

  • QoR improvements
  • Asymmetric RAM enhancements
  • DSP enhancements
  • includes syntax help for VHDL constructs

2014-03-18

Xilinx ISE 14.7 is now available on guo's Software Server

IMPORTANT: As ISE enters it's sustaining phase of product life there will be no more major releases. However, updates and patches might still be released.

  • 7 series and Zynq device and IP updates

2011-01-07

HDL-Designer 2013.1 is now available on guo's Software Server

  • VHDL 2008: Logical Shift Operators, Simplified Case Statements, Delimited Comments
  • new SystemVerilog Assistant
  • Register Assistant 4.5, Design Checking Enhancements, Vendor flow updates, Platform support updates

2013-12-11

New Heavyweight FPGA Champion: Xilinx announced the new Virtex UltraScale All Programmable devices

This 3D IC contains three die (SLR) to achieve:

  • 4.4M logic cells (approx. 50M ASIC gates)
  • 88.6 Mbits BRAM
  • 2880 DSP48 slices (4268 GMACs/sec)
  • hard-IPs: 6 x PCIe, 3 x 100G Ethernet MAC, 48 x 16.3 Gbps transceivers
  • 1456 I/O Pins

2013-11-29

In need of a Qt Library? Like to publish one? Check out #inqlude!

Inqlude is meant to be the place where you find all information and pointers to Qt libraries, components or modules. There's the webpage, a format for describing Q-based libraries and a command line client to install libraries. It's all still in alpha phase, but certainly worth a look. For more and up-to-date information follow this link.

2013-07-18

Xilinx ISE 14.6 is now available on guo's Software Server

  • IP updates
  • further Device Support for Zynq-7000 and Defenense-Grade Zynq-7000Q, Artix-7Q, Virtex-7Q

2013-06-19

IGLOO for the masses: Microsemi announced the new IGLOO2 FPGA

Like the old IGLOOs, it's based on the non-volatile Flash technology, with it's advantages of independence from external configuration devices, lower power (flash freeze), higher radiation immunity and security. Up until now, Flash based devices have been rather small. But with IGLOO2, Microsemi is now in direct competition with the other important FPGA manufacturers. IGLOO2 has

  • 6-150 kLUTs (like Xilinx Artix-7 or Spartan6)
  • up to 16 5G SerDes (competitors: <10)
  • max. 574 User IOs (like Spartan6, more than Artix-7)
  • 700-5000 kBits RAM
  • up to 2 DDR controllers and 4 PCIe endpoints

The M2GL050 is already shipping and starts at less than $7USD for high volume orders.

2013-05-31

OSVVM release 2013.05 is now available on guo's Software Server

  • adds large vector randomization
  • has a work around for some Aldec issues

The IEEE Std 1800-2012 a.k.a. SystemVerilog is available for download

The 31 new features, 60 clarifications and 71 corrections of the standard include:

  • Multiple inheritance !
  • Soft constraints
  • Uniqueness constraints
  • A different global clock can be defined for each hierarchy scope

More infos here

UIT Wiki Presentation

The presentation slides can be downloaded here.

UVM 1.1b

This bugfix release is available for download now.

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