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| + | #REDIRECT [[Kart]] |
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| − | The [[Media:Kart Control V40.pdf|FPGA motherboards]] are equipped with
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| − | an AGL125 [http://www.microsemi.com/products/fpga-soc/fpga/igloo-overview IGLOO] in a VQ100 package and a 10 MHz Quartz.
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| − | [[File:Fpga board.jpg|center|200px|FPGA motherboard]]
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| − | == Connection ==
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| − | They have two I2C connectors on one side and the programming connector on the other side.
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| − | The I2C connectors allow daisy chaining either with fixed-length PCBs or with flat cables.
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| − | The daughterboards connect on the two single row connectors on the long sides.
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| − | The mounting screws on 3 corners only are used to secure against placing the daughter board the wrong way round.
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| − | The following figure shows the pinning in case of test needs:
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| − | [[File:Kart FPGA boards pins.svg|center|FPGA board pingnni]]
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| − | == Test ==
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| − | A [[Media:Kart tester board.pdf|test board]] routes the FPGA motherboard connector pins
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| − | from one to the next.
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| − | The path also includes the SCL and SDA pins of the bus connector.
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| − | The path extremities are located on spare I/Os of the JTAG programming connector.
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| − | Each pair of pins are also connected to a LED, which shows to what extent the signal path is functional.
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| − | [[File:Kart fpga test board.JPG|center|400px|FPGA motherboard]]
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| − | A square wave is sent from one extermity to the other, thus having half of the pins working as outputs and the other half working as inputs.
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| − | A switch allows to invert the path's direction, thus changing the I/O mode of all the pins.
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| − | The system is powered via a circular connector which connects to a 3.3 V regulator.
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| − | 5 V is a good power voltage candidate.
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| | [[Category:Kart]] | | [[Category:Kart]] |
