Revision history of "Projects/usbCypress/VHDL Summary"

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  • (cur | prev) 11:55, 11 June 2012‎ Zas (Talk | contribs)‎ (279 bytes) (Created page with "{{TOC right}} make an interface: Slave FIFO make an part command, a part data receive and a part data send. It's possible to work in synchronous or asynchronous mode. To k...")
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