Hardware/FPGAEBS
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| V2.0 || [[File:FPGA_Full_v2_0.jpg|200px|FPGA EBS V2.0]] || [[File:FPGA_Student_v2_0.jpg|200px|FPGA EBS Student Version V2.0]] || Not existing ||[[Media:FPGA_EBS_v2_0_schematics.pdf|FPGA-EBS v2.0 Schematic PDF]] || [[Media:FPGA_EBS_v2_xc3s500e.ucf|FPGA-EBS v2.0 XC3S500E UCF]] <br> [[Media:FPGA_EBS_v2_xc3s1200e.ucf|FPGA-EBS v2.0 XC3S1200E UCF]] || Second FPGA-EBS Version comes only with Xilinx XC3S500E | | V2.0 || [[File:FPGA_Full_v2_0.jpg|200px|FPGA EBS V2.0]] || [[File:FPGA_Student_v2_0.jpg|200px|FPGA EBS Student Version V2.0]] || Not existing ||[[Media:FPGA_EBS_v2_0_schematics.pdf|FPGA-EBS v2.0 Schematic PDF]] || [[Media:FPGA_EBS_v2_xc3s500e.ucf|FPGA-EBS v2.0 XC3S500E UCF]] <br> [[Media:FPGA_EBS_v2_xc3s1200e.ucf|FPGA-EBS v2.0 XC3S1200E UCF]] || Second FPGA-EBS Version comes only with Xilinx XC3S500E | ||
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− | | V1.0 || [[File:FPGA_Full_v1_0.jpg|200px|FPGA EBS V1.0]] || [[File:FPGA_Student_v1_0.jpg|200px|FPGA EBS Student Version V1.0]] || [[File:FPGA_Mezza_v1_0.jpg|115px|FPGA EBS Mezza Version V1.0]] || [[Media:FPGA_EBS_v1_0_schematics.pdf|FPGA-EBS v1.0 Schematic PDF]] || First FPGA-EBS Version comes with a Xilinx XC2S150 or XC2S250 FPGA. <br> '''Please note that for Spartan 2 is no longer supported by Xilinx, an ISE Version <= 9.2i has to be used''' | + | | V1.0 || [[File:FPGA_Full_v1_0.jpg|200px|FPGA EBS V1.0]] || [[File:FPGA_Student_v1_0.jpg|200px|FPGA EBS Student Version V1.0]] || [[File:FPGA_Mezza_v1_0.jpg|115px|FPGA EBS Mezza Version V1.0]] || [[Media:FPGA_EBS_v1_0_schematics.pdf|FPGA-EBS v1.0 Schematic PDF]] || Not available ||First FPGA-EBS Version comes with a Xilinx XC2S150 or XC2S250 FPGA. <br> '''Please note that for Spartan 2 is no longer supported by Xilinx, an ISE Version <= 9.2i has to be used''' |
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Revision as of 08:27, 27 April 2012
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There are several Version of FPGA EBS Boards
Type | FPGA-EBS Full board | FPGA-EBS Student board | FPGA-EBS Mezzanine | Schematic | UCF | Description |
V2.1 | ![]() |
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FPGA-EBS v2.1 Schematic PDF | FPGA-EBS v2.1 XC3S500E UCF FPGA-EBS v2.1 XC3S1200E UCF |
Improved second version of FPGA-EBS comes with Xilinx XC3S500e or XC3S1200E. Note that there is a different UCF Pin constraining file |
V2.0 | ![]() |
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Not existing | FPGA-EBS v2.0 Schematic PDF | FPGA-EBS v2.0 XC3S500E UCF FPGA-EBS v2.0 XC3S1200E UCF |
Second FPGA-EBS Version comes only with Xilinx XC3S500E |
V1.0 | ![]() |
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FPGA-EBS v1.0 Schematic PDF | Not available | First FPGA-EBS Version comes with a Xilinx XC2S150 or XC2S250 FPGA. Please note that for Spartan 2 is no longer supported by Xilinx, an ISE Version <= 9.2i has to be used |
A VHDL test code with the default UCF Files can be found at:
i:\Institut\Infrastructure\Labos\A309\FPGA\VHDL\ELN_board\
UCF Pin Differences
On the FPGA-EBS v2.X Boards, you can find two different FPGA Spartan3 Chips.
There are 3 Pin differences between Boards with XC3S500E and XC3S1200E.
Pin Function | Pin on XC3S500E | Pin on XC3S1200E |
ParallelPort2(16) | F4 | E6 |
MezzanineData(9) | E17 | E3 |
sdCke | P15 | P15 |