Components/IP/NanoBlaze
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Component
The NanoBlaze is a grow-up of the Xilinx PicoBlaze microcontroller, hence the name. Various sizes can be defined with the help of generic parameters:
registerBitNb
defines the data bit widthprogramCounterBitNb
allows to cope with different program lengthsstackPointerBitNb
adapts to various nesting depths of the subroutinesregisterBitNb
defines the data bit widthregisterAddressBitNb
allows to choose the number of internal registersscratchPadAddressBitNb
allows to manage the size of the scratchpadaddressBitNb
defines the size of the I/O space
With scratchPadAddressBitNb = 0
, the scratchpad is not implemented.
The NanoBlaze's instruction ROM is designed to be mapped as a Block RAM.
Contrarily to the PicoBlaze, the NanoBlaze performs every instruction within a single clock cycle. Due to the mapping of the instruction ROM into a Block RAM, the instructions are provided delayed by one clock period compared to the program counter. With this, when a branch condition is met, the processor will anyway receive the instruction of the next memory location. Obviously, this instruction will not be executed, but this means that every successful branch requires two clock cycles.
Assembler
It has an assembler written in PERL which runs on any operating system. With this, the assembler can easily be integrated in the Mentor HDL Designer environment.
The VHDL processor code includes a disassembler process which writes the current instruction in the form of a string.
This string can be displayed in the simulator for debugging purpose.
The corresponding VHDL code is commented out for synthesis via the pragma translate_off
clause.
Instruction set
The following table shows the instruction set for an 8 bit processor with 10 address bits:
instruction | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | function |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
FETCH sX, kk | 000110 | sX address | kk value | loads scratchpad value at address kk to register sX | |||||||||||||||
FETCH sX, (sY) | 000111 | sX address | sY address | loads scratchpad value at address sY to register sX | |||||||||||||||
AND sX, kk | 001010 | sX address | kk value | applies bitwise AND of constant kk pattern to register sX | |||||||||||||||
AND sX, sY | 001011 | sX address | sY address | applies bitwise AND of register sY pattern to register sX | |||||||||||||||
COMPARE sX, kk | 010100 | sX address | kk value | compares kk pattern with register sX and sets C and Z flags | |||||||||||||||
COMPARE sX, sY | 010101 | sX address | sY address | compares register sY with register sX and sets C and Z flags | |||||||||||||||
ADD sX, kk | 011000 | sX address | kk value | adds constant kk to register sX | |||||||||||||||
ADD sX, sY | 011001 | sX address | sY address | adds register sY to register sX | |||||||||||||||
ADDCY sX, kk | 011010 | sX address | kk value | adds constant kk and carry bit to register sX | |||||||||||||||
ADDCY sX, sY | 011011 | sX address | sY address | adds register sY and carry bit to register sX | |||||||||||||||
CALL addr | 11000000 | program address | calls function at address | ||||||||||||||||
CALL Z addr | 11000100 | program address | calls function at address if zero flag is set | ||||||||||||||||
CALL NZ addr | 11000101 | program address | calls function at address if zero flag is not set | ||||||||||||||||
CALL C addr | 11000110 | program address | calls function at address if carry flag is set | ||||||||||||||||
CALL NC addr | 11000111 | program address | calls function at address if carry flag is not set |
Sources
This IP is found in the HEVs EDA Repository: svn: https://repos.hevs.ch/svn/eda/