File:HISADDA INDEV.png
From UIT
(Difference between revisions)
(uploaded a new version of "File:HISADDA INDEV.png": PCB Layout Version 1.00) |
m |
||
(One intermediate revision by one user not shown) | |||
Line 1: | Line 1: | ||
HES-SO FPGA Rack Hi-Speed AD/DA V1.0 | HES-SO FPGA Rack Hi-Speed AD/DA V1.0 | ||
− | ( | + | (Without heatsink on ADC, DAC and clock generator) |
Latest revision as of 08:40, 6 May 2015
HES-SO FPGA Rack Hi-Speed AD/DA V1.0 (Without heatsink on ADC, DAC and clock generator)
File history
Click on a date/time to view the file as it appeared at that time.
Date/Time | Thumbnail | Dimensions | User | Comment | |
---|---|---|---|---|---|
current | 13:44, 16 February 2015 | 2,048 × 1,156 (597 KB) | Alexandr.ganchinh (Talk | contribs) | (Mounted board picture.) | |
17:14, 27 December 2014 | 3,436 × 1,792 (590 KB) | Alexandr.ganchinh (Talk | contribs) | (PCB Layout Version 1.00) | ||
10:49, 27 August 2014 | 1,425 × 819 (77 KB) | Gal (Talk | contribs) | (HES-SO FPGA Rack Hi-Speed AD/DA V1.0 (In development PCB capture)) |
- Edit this file using an external application (See the setup instructions for more information)
File usage
The following 2 pages link to this file: