Projects

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[[Category:Projects]]

Revision as of 14:58, 7 February 2012

Contents

Here you can find a list of EDA projects carried out at the HES-SO//VS

USBCypress

This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip

AMBAdraw (a.k.a. AMBArchitect)

Graphical user interface (GUI) for GRLIB-AMBA

Math2Mat

Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.

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