OBC/PIC PIC microcontroller
From CHESS_OBC
Contents |
PIC18LF26K83
Configuration
Clock is set to the highest value (64MHz) as the board is made for test purposes. It could be lowered if a such speed is not needed for the final use. Typically in order to reduce power consumption
Note that if done so, some parameters may need to be changed
CAN
As described in the ADCS control document, the CAN configuration is the following : version 2.0 B, extended ID, SP set to 87.5% and SJW = 1, bus speed 125 kbps.
| Register | Hex | Parameter | Description |
|---|---|---|---|
| BRGCON1 | 0x0F | BRP | (2x16)/FOSC |
| SJW | 1 x TQ | ||
| BRGCON2 | 0xBC | PRSEG | 5 x TQ |
| SAM | once at sample point | ||
| SEG1PH | 8 x TQ | ||
| SEG2PHTS | Freely programmable | ||
| BRGCON3 | 0x01 | SEG2PH | 2 x TQ |
| WAKDIS | Enable CAN wake-up | ||
| WAKFIL | CAN line filter not used |
