Hardware/FPGAEBS/Configuration
From UIT
|
General
After designing and simulating your design based on VHDL Template Design, you have to prepare it:
In HDL-Designer
- Generates all VHDL Files
- Concatenates them into a single VHDL File (
<library>\concat\concatenated.vhd
) - Trims work libraries (<library>\concat\<designName>.vhd)
- Updates the ISE (*.xise) Project file
- Launches ISE
In ISE
- Runs Synthesis
- Runs P&R
- Generate Programming File *.bit
- Launches Impact
After that you can either way download the file directly to the FPGA or create another file to download to the non-volatile memory.
FPGA Configuration
If you want to program the FPGA directly, you can use the previously generated *.bit file.
Execute the following steps:
- Perform a boundary Scan
- Left click on the FPGA symbol (turns green)
- Right click on the FPGA
- Choose Assign new configuration file
- Choose previously generated *.bit file in folder
Xilinx
- Choose No for Attaching SPI or BPI PROM
- Right click on the FPGA
- Choose Program
- Choose Verify if you like (not necessary)
- DONE
Flash Writing
To program the xcf04s Platform Flash In-System Programmable Configuration PROM you need to turn your *.bit into an *.mcs file. This file can then be used to program the Platform Flash through JTAG.
Flash programming works ONLY with Official Xilinx USB Programmer