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After designing and simulating your design based on VHDL Template Design, you have to prepare it:

In HDL-Designer


Perform Task Flow Prepare for Synthesis

  1. Generates all VHDL Files
  2. Concatenates them into a single VHDL File (<library>\concat\concatenated.vhd)
  3. Trims work libraries (<library>\concat\<designName>.vhd)


Perform Task Flow Xilinx Project Navigator

  1. Updates the ISE (*.xise) Project file
  2. Launches ISE



Perform Task Generate Programming File

  1. Runs Synthesis
  2. Runs P&R
  3. Generate Programming File *.bit


Perform Task Configure Target Device

  1. Launches Impact

After that you can either way download the file directly to the FPGA or create another file to download to the non-volatile memory.

FPGA Configuration

If you want to program the FPGA directly, you can use the previously generated *.bit file.

Execute the following steps:

  1. Perform a boundary Scan
    1. Initialise Chain (CTRL + i)
      FPGA prog 1
  2. Left click on the FPGA symbol (turns green)
    FPGA prog 2
  3. Right click on the FPGA
    1. Choose Assign new configuration file
      FPGA prog 3
    2. Choose previously generated *.bit file in folder Xilinx
    3. Choose No for Attaching SPI or BPI PROM
      FPGA prog 4
  4. Right click on the FPGA
    1. Choose Program
      FPGA prog 5
    2. Choose Verify if you like (not necessary)
      FPGA prog 6
  5. DONE
    FPGA prog 7

Flash Writing

To program the xcf04s Platform Flash In-System Programmable Configuration PROM you need to turn your *.bit into an *.mcs file. This file can then be used to program the Platform Flash through JTAG.

Flash programming works ONLY with Official Xilinx USB Programmer

Create Flash *.mcs File

  1. Choose Task Create PROM File
    FPGA Flash prog 1
  2. Dialog File PROM Formatter opens
    1. Choose Xilinx Flash/PROM
    2. Click the first green arrow
    3. Choose Device (bits) xcf04s [4M]
    4. Click Add Storage Device
    5. Click the second green arrow
    6. Choose your Output File Name
    7. Choose your Output File Location
    8. Click OK
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