Hardware/Parallelport/heb microphone

From UIT
Jump to: navigation, search


The board was designed for the SEm VHDL FSM lab.

It has a beeper which can emit a Morse code signal and a microphone for receiving it.

Version Photo Schematics Stock
V1.1 HEB-microphone HEB-microphone Schematic PDF 10 fully mounted


The beeper is driven directly by a digital I/O line.


The microphone's output is amplified and connected to an ADC. The amplified signal is also triggered in order to deliver a simple digital input to the FPGA.


The microphone's output is quite small. It is first fed to a fixed amplifier through a passive RC highpass. After this, it is brought to an amplifier with a variable gain, and finally to a trigger.

The buzzer/microphone couple have 2 resonant frequencies: one around 3 kHz and the other around 4 kHz.

The trigger is a Schmitt trigger. When there is no signal, the trigger output can be as well low or high.

The following picture shows the signal levels

  • at the buzzer
  • at the output of the first amplifier (testpoint near buzzer)
  • at the output of the variable amplifier (Ampli testpoint)
  • at the output of the trigger (Trig testpoint)
microphone signal levels

To come to these signals:

  • set the gain of the amplifier with the potentiometer close to the buzzer: screwing reduces the gain
  • set the trigger range with the other potentiometer: first unscrew until the output is too noisy then screw until it looks fine.
Personal tools