Projects
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== USBCypress == | == USBCypress == | ||
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip | This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip | ||
− | * [https://svn.hevs.ch/trac/usbcypress USB Cypress Trac Wiki] | + | * [https://svn.hevs.ch/trac/usbcypress USB Cypress Trac Wiki] <-- deprecated |
[[Category:Projects]] | [[Category:Projects]] |
Revision as of 08:23, 25 May 2012
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Here you can find a list of EDA projects carried out at the HES-SO//VS
PTP
An internal research project on the IEEE Std 1588 - Precision Time Protocol.
EzCat
Project in collaboration with HEIG-VD
AMBAdraw (a.k.a. AMBArchitect)
Graphical user interface (GUI) for GRLIB-AMBA
Math2Mat
Automatically translate mathematical formulas to VHLD code, inclusive optimisation and testbench in SystemVerilog.
Microcone
An intelligent Microphone to record group conversations
MAC IP
An Ethernet Transceiver IP for FPGA
FPGA-EBS
FPGA Development Card
Swiss Cube
USBCypress
This is a VHDL IP core which allows to connect a FPGA to PC over USB with help of a Cypress USB driver chip
- USB Cypress Trac Wiki <-- deprecated