Hardware/Extention/Passive Ethertap
From UIT
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Passive Ethernet Tap
The Ethernet tap allows to monitor the traffic on an Ethernet link passively, filter the frames and send them to the to the connected FPGA. It is used and devloped during Diplomaworks in Sweden and should be connected the the Actel CoreMP7 Dev-Kit.
Version | Photo | Schematic | Description |
---|---|---|---|
V1.1 | FPGA Passive Ethernettap Schematic PDF | 2 Port EthernetTap with RS422 and a CPLD |
Check for availability in the hardware stock.
More informations can be found at:
i:\Institut\Infrastructure\Labos\A309\FPGA\Ethernet\Wiretap\