From FSI
Jump to: navigation, search


The CanSat is a micro-satellite used for student competitions to educate the whole development chain from design until launch of space equipment.

The CanSat has the form of a soda can with a diameter of 66 mm and a height of 115 mm. The weight is limited to 350 g.


HEI CanSat

The CanSat demonstrator for the HES-SO MSE HiRel module is made out of 5 vertical boards held together by a bottom and a top interconnect ring.

Vertical Boards

The boards hold the following components:

  1. an FPGA
  2. sensors
  3. an XBee module
  4. a microprocessor
  5. a power converter

Standard 2x6 pin connectors compatible to the Pmod™ specification serve as electronic as well as mechanical connection to the interconnect boards.

The FPGA board serves as master (or as a router) and therefore connects to all other boards through 4 double Pmods, two on the bottom side and two on the top side. Each of the slave boards connects to the FPGA board through 2 Pmods, one on each side.

Interconnect Boards

Both Interconnect boards share the same layout, but with the connectors mounted once on one side ans once on the other.

Each one of the four 6 pin connectors on the master board connect to exactly one slave board.



The question is, how to get as much PCB real-estate out of such a limited and unusual satellite form-factor. We decided to go for a vertical solution with 5 PCBs. Furthermore we like to have all PCBs of the same size. This means that the they will be aligned along the central axis in the form of a star or a pentagon. To find the optimal solution we investigated all the possibilities in between these two geometrical figures.

Pcb 5 angles.svg

The biggest PCB board surface is attained at a tilt of 18° from the base pentagon.

Pcb surface 5.svg

These boards are held in place and connected together with two round boards, one on the top and one on the bottom.


Power Consumption

Following figure shows the power consumption of a CubeSat containing a Master FPGA and a Slave Power. A sample design has been loaded into the FPGA which lights up LD1 on the Slave Power and oscillates LD2. The oscillation of the LED is the cause of the oscillation visible on the current.

CanSat power consumption.PNG
Personal tools
Modules / Projects