Hardware/Parallelport/heb inverter
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| V1.0 ||[[File:Heb inverter.jpg|200px|HEB-Synchro]] || [[Media:FPGA PP inverter.pdf|HEB-inverter Schematic PDF]] || [[Hardware/Stock_PP#HEB_Synchro|16fully mounted]] | | V1.0 ||[[File:Heb inverter.jpg|200px|HEB-Synchro]] || [[Media:FPGA PP inverter.pdf|HEB-inverter Schematic PDF]] || [[Hardware/Stock_PP#HEB_Synchro|16fully mounted]] | ||
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+ | = XXX = | ||
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+ | 3 | 860 | ||
+ | 4 | 170 | ||
+ | 5 | 70 | ||
+ | 6 | 70 | ||
[[Category:Hardware]] [[Category:Parallelport]] [[Category:HEB]] | [[Category:Hardware]] [[Category:Parallelport]] [[Category:HEB]] |
Revision as of 13:24, 17 January 2022
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Inverter board
The board was designed for the ETE ELN-inverter lab.
It receives 4 PWM signals to drive an H-Bridge. The bridge is followed by an LC-lowpass and a transformer.
A sigma-delta ADC reads the LC filter output and enables to adjust the output voltage.
Version | Photo | Schematics | Stock |
---|---|---|---|
V1.0 | HEB-inverter Schematic PDF | 16fully mounted |
XXX
3 | 860 4 | 170 5 | 70 6 | 70