Hardware/FPGARackBackplane
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! Type || Name || Image || Schematic || Description | ! Type || Name || Image || Schematic || Description | ||
|- | |- | ||
− | + | | V1.0 || Rack Stack Backplane || [[File:FPGA_Rack_Backplane_Stack_v1_0.jpg|200px|FPGA Rack Backplane Stack V1.0]] || [[Media:FPGA_Rack_Backplane_Stack.pdf|FPGA Rack Backplane Stack Schematic PDF]] || Stack Backplane for 4 boards. These boards can even be chained for offering more connections | |
− | + | ||
− | | V1.0 || Rack Stack Backplane || [[File:FPGA_Rack_Backplane_Stack_v1_0.jpg|200px|FPGA Rack Backplane Stack V1.0]] || [[Media:FPGA_Rack_Backplane_Stack.pdf|FPGA Rack Backplane Stack Schematic PDF]] || Stack Backplane for 4 boards. These boards can even be | + | |
|- | |- | ||
+ | | V1.0 || Rack flat Backplane || [[File:FPGA_Rack_Backplane_Flat_v1_0.jpg|200px|FPGA Rack Backplane Flat V1.0]] || [[Media:FPGA_Rack_Backplane_Flat.pdf|FPGA Rack Backplane Flat Schematic PDF]] || Flat Backplane for 6 boards. Note that the '''speed in vastly minimised because of the length of the signals''' | ||
|} | |} | ||
= Rack Compatible Boards = | = Rack Compatible Boards = | ||
− | * [[Hardware/FPGARack|HES-SO FPGA Rack Board]] | + | * [[Hardware/FPGARack|HES-SO FPGA Rack Board]] (HMVE16/32) |
− | * [[Hardware/FPGARackADDAV1|HES-SO FPGA Rack AD-DA Board]] | + | * [[Hardware/FPGARackADDAV1|HES-SO FPGA Rack AD-DA Board]] (HMVE16/32) |
− | * [[Hardware/FPGARackDebug|HES-SO FPGA Rack Debug Board]] | + | * [[Hardware/FPGARackHiSADDAV1|HES-SO FPGA Rack Hi-Speed AD-DA Board]] (HMVE16) |
+ | * [[Hardware/FPGARackRelayCtrlV1|HES-SO FPGA Rack Relay Control Board]] (HMVE16) | ||
+ | * [[Hardware/FPGARackDebug|HES-SO FPGA Rack Debug Board]] (HMVE16/32) | ||
+ | * [[Hardware/RackParallelPortBackplane|HES-SO FPGA Rack ParallelPort Backplane]] (HMVE16) | ||
+ | |||
+ | = Enclosure = | ||
+ | |||
+ | The ''toaster'' enclosure houses a single backplane and a set of boards: | ||
+ | [[File:FPGA Rack Toaster.jpg|center|750px]] | ||
= Boards in Use = | = Boards in Use = | ||
− | + | <gallery widths=250px heights=250px> | |
− | + | File:FPGA_Rack_Backplane_Flat_Demo.jpg|FPGA Rack Backplane Flat Demo | |
+ | File:FPGA_Rack_Backplane_Stack_Demo.jpg|FPGA Rack Backplane Stack Demo | ||
+ | File:USLO-rack-card.png|[[Projects/USLO|USLO]] PP-Backplane with daughtercards | ||
+ | File:USLO_ISI_toaster.JPG|[[Projects/USLO|USLO]] ISI toaster fully equipped | ||
+ | </gallery> | ||
[[Category:Hardware]] [[Category:FPGARack]] [[Category:VME]] | [[Category:Hardware]] [[Category:FPGARack]] [[Category:VME]] |
Latest revision as of 12:11, 15 February 2021
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Rack Backplanes
There are several versions of the FPGA Rack Backplane. Both are intended for the HES-SO FPGA Rack Board, these feature a 3x32 Pin Backplane Connector in order to interconnect multiple boards together.
There is also a VME IP Core available for easily create a data communication for a number of Rack compatible Boards.
Type | Name | Image | Schematic | Description |
---|---|---|---|---|
V1.0 | Rack Stack Backplane | ![]() |
FPGA Rack Backplane Stack Schematic PDF | Stack Backplane for 4 boards. These boards can even be chained for offering more connections |
V1.0 | Rack flat Backplane | ![]() |
FPGA Rack Backplane Flat Schematic PDF | Flat Backplane for 6 boards. Note that the speed in vastly minimised because of the length of the signals |
Rack Compatible Boards
- HES-SO FPGA Rack Board (HMVE16/32)
- HES-SO FPGA Rack AD-DA Board (HMVE16/32)
- HES-SO FPGA Rack Hi-Speed AD-DA Board (HMVE16)
- HES-SO FPGA Rack Relay Control Board (HMVE16)
- HES-SO FPGA Rack Debug Board (HMVE16/32)
- HES-SO FPGA Rack ParallelPort Backplane (HMVE16)
Enclosure
The toaster enclosure houses a single backplane and a set of boards: