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• Components/IP/SPI
  [[File:SPI_master_slave.png|200px|SPI Master Slave Architecture]] ...sted. The SPI bloc can also be found in the template design in the library SPI.
  2 KB (306 words) - 12:53, 24 January 2013
• Components/Libraries/VHDL/SPI
  The toplevel block <code>spiFIFO</code> provides a SPI interface and two FIFO interface. The Master FIFO interface serves as buffer for data to send on the SPI line.
  935 B (130 words) - 12:43, 1 October 2012

Page text matches

• Hardware
  ...anSat/Master_FPGA CanSat Master FPGA] - ''Spartan 6 XC6SLX9 and 8Mb M25P80 SPI PROM''
  6 KB (745 words) - 09:23, 6 September 2022
• Components
  * [[Components/IP/SPI|SPI IP Core]]
  1 KB (169 words) - 12:34, 6 June 2018
• Components/Designs/VHDL template
  ├───SPI -- Library SPI for SPI Communication └───SPI_test -- Testbench for Library SPI
  10 KB (1,006 words) - 07:12, 10 June 2016
• Hardware/FPGARack/Programmation
  ## Choose No for Attaching SPI or BPI PROM # Right Click on the Blue SPI/BPI Symbol
  4 KB (567 words) - 06:49, 15 July 2014
• Components/Libraries/VHDL
  ; [[Components/Libraries/VHDL/SPI|SPI]] : SPI Communication
  2 KB (218 words) - 15:06, 2 August 2018
• Components/Libraries/VHDL/RS232
  ...VHDL|up_name=VHDL libraries|right=Components/Libraries/VHDL/SPI|right_name=SPI}}
  994 B (134 words) - 08:55, 3 December 2012
• Components/IP/SPI
  [[File:SPI_master_slave.png|200px|SPI Master Slave Architecture]] ...sted. The SPI bloc can also be found in the template design in the library SPI.
  2 KB (306 words) - 12:53, 24 January 2013
• Components/Libraries/VHDL/SPI
  The toplevel block <code>spiFIFO</code> provides a SPI interface and two FIFO interface. The Master FIFO interface serves as buffer for data to send on the SPI line.
  935 B (130 words) - 12:43, 1 October 2012
• Inventory/CPU/Interfaces
  == CSR USB to SPI Converter == [[File:csr-usb-spi.jpg‎]]
  2 KB (293 words) - 11:48, 10 September 2014
• Standards/HEI 'VME' Backplane Bus
  * Some serial buses (UART, SPI, I2C) | style="background:#ffffff ; text-align:left" | SPI-Bus clock signal
  17 KB (2,529 words) - 14:32, 5 April 2017
• Hardware/Actel SmartFusion
  * Two RJ45 connectors for EtherCAT port connection through soft SPI core in the fabric and external PHY) * SPI headers
  2 KB (333 words) - 13:07, 27 February 2013
• Inventory/Measurement/ProtocolAnalyzer
  ...d Low Energy sniffer, with concurrent capture of spectrum, HCI (USB, UART, SPI), WCI-2, logic signals, and Audio I2S. See http://www.ellisys.com/products/
  2 KB (218 words) - 06:50, 16 September 2015
• Hardware/ARMEBS/4
  | Gyroscope || ST L3GD20 || i2c/SPI MEMS 3-axis digital gyroscope || U23 || [[Media:L3GD20.pdf|datasheet]]
  3 KB (424 words) - 09:39, 13 May 2016
• Hardware/FPGAEBS/Configuration
  ## Choose No for Attaching SPI or BPI PROM # Right Click on the Blue SPI/BPI Symbol
  4 KB (565 words) - 13:01, 20 January 2015
• Components/IP/HEB LCD
  * baudRateDivide, which gives the SPI clock rate as a function of the system clock The [[Hardware/Parallelport/heb_lcd|display's]] maximal SPI rate is 20&nbsp;MHz.
  11 KB (1,130 words) - 14:24, 16 January 2018
• Hardware/FPGARackHiSADDAV1
  * automatically on boot via the onboard FLASH memory (SPI x1/x4). * '''OK''' FPGA boot FLASH programming/booting (with SPI 1x and 4x).
  5 KB (779 words) - 10:42, 12 December 2016
• EclipseArmebs4/DemoProjects
  ...le using a common abstraction layer. Common functions are provided for the SPI, UART and I2C buses. Peripherals used : SPI, leds
  10 KB (1,486 words) - 08:06, 21 April 2016
• Projects/Envirobot
  The SensorCtrl board provides power, a serial bus, an I2C bus as well as an SPI bus, a Digital Camera Interface, 3 ADC inputs and 3 timer outputs.
  7 KB (1,087 words) - 15:26, 31 July 2017
• Hardware/FPGARackZynqADDAV1
  ** 1x 32Mbyte SPI FLASH memory
  3 KB (442 words) - 13:11, 15 March 2017
• Hardware/PICEBS/Welcome
  ** UART, SPI, I2C
  5 KB (714 words) - 15:00, 1 February 2018